From 1ba3b0dcaff0983044ab2a22f134df95dd3cc070 Mon Sep 17 00:00:00 2001
From: Void NV <voidnv@protonmail.com>
Date: Tue, 17 Mar 2020 09:40:18 -0500
Subject: [PATCH] SMBIOS parsing in progress. Partial AHCI definitions. Rename
 GetStr to StrGet Net code from TomAwezome

---
 ...o => Zenith-latest-2020-03-17-09_36_07.iso | Bin 34613248 -> 34658304 bytes
 src/Apps/Logic/Logic.CC                       |   2 +-
 src/Apps/Psalmody/PsalmodyMain.CC             |   2 +-
 src/Apps/TimeClock/TimeClk.CC                 |   4 +-
 src/Compiler/CMisc.CC                         |   2 +-
 src/Demo/AcctExample/PersonalNotes.DD         |   4 +-
 src/Demo/Define.CC                            |   2 +-
 src/Demo/Graphics/Cartesian.CC                |   2 +-
 src/Demo/Lectures/MiniCompiler.CC             |   2 +-
 src/Demo/PhoneNumWords.CC                     |   2 +-
 src/Demo/Prompt.CC                            |   2 +-
 src/Demo/SuggestSpelling.CC                   |   2 +-
 src/Doc/ChangeLog.DD                          |   5 +
 src/Home/K.CC                                 |   2 +-
 src/Home/Net/ARP.CC                           | 235 ++++++++
 src/Home/Net/Ethernet.CC                      |  52 ++
 src/Home/Net/MappingShrineAlgs.DD             | Bin 0 -> 1074 bytes
 src/Home/Net/Net.HH                           |  21 +
 src/Home/Net/NetFuncSummary.DD                |  73 +++
 src/Home/Net/NetHandlerTask.CC                |  35 ++
 src/Home/Net/NetQueue.CC                      |  85 +++
 src/Home/Net/NetQueueDiagram.DD               | Bin 0 -> 295 bytes
 src/Home/Net/NetworkingNotes.DD               |  56 ++
 src/Home/Net/PCNet.CC                         | 508 ++++++++++++++++++
 src/Home/Net/ZenithStackNotes.DD              | Bin 0 -> 199 bytes
 src/Home/SMBIOS.CC                            | 261 +++++++++
 src/Kernel/KConfig.CC                         |   8 +-
 src/Kernel/KernelA.HH                         | 277 ++++++----
 src/Kernel/KernelC.HH                         |   4 +-
 src/Kernel/SerialDev/Message.CC               |   4 +-
 src/Misc/OSInstall.CC                         |   8 +-
 src/Zenith/Ctrls/CtrlsSlider.CC               |   4 +-
 src/Zenith/DolDoc/DocGet.CC                   |   6 +-
 src/Zenith/DolDoc/DocPopUp.CC                 |   2 +-
 src/Zenith/ZBlkDev/Mount.CC                   |   2 +-
 src/Zenith/ZDebug.CC                          |  24 +-
 36 files changed, 1539 insertions(+), 159 deletions(-)
 rename Zenith-latest-2020-03-12-22_41_57.iso => Zenith-latest-2020-03-17-09_36_07.iso (99%)
 create mode 100644 src/Home/Net/ARP.CC
 create mode 100644 src/Home/Net/Ethernet.CC
 create mode 100644 src/Home/Net/MappingShrineAlgs.DD
 create mode 100644 src/Home/Net/Net.HH
 create mode 100644 src/Home/Net/NetFuncSummary.DD
 create mode 100644 src/Home/Net/NetHandlerTask.CC
 create mode 100644 src/Home/Net/NetQueue.CC
 create mode 100644 src/Home/Net/NetQueueDiagram.DD
 create mode 100644 src/Home/Net/NetworkingNotes.DD
 create mode 100644 src/Home/Net/PCNet.CC
 create mode 100644 src/Home/Net/ZenithStackNotes.DD
 create mode 100644 src/Home/SMBIOS.CC

diff --git a/Zenith-latest-2020-03-12-22_41_57.iso b/Zenith-latest-2020-03-17-09_36_07.iso
similarity index 99%
rename from Zenith-latest-2020-03-12-22_41_57.iso
rename to Zenith-latest-2020-03-17-09_36_07.iso
index 7c56772478b4e76be4d966eef5f2bcfe4e98f241..ecd75b5325d3629bd43d4fca21281c5bb0f63c27 100644
GIT binary patch
delta 105124
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diff --git a/src/Apps/Logic/Logic.CC b/src/Apps/Logic/Logic.CC
index efaa62ee..bb639809 100755
--- a/src/Apps/Logic/Logic.CC
+++ b/src/Apps/Logic/Logic.CC
@@ -90,7 +90,7 @@ U0 GetGates()
 	num_sel_gates=0;
 	while (num_sel_gates<GT_ENTRIES_NUM) {
 		"%d",num_sel_gates;
-		st=GetStr(" Gate: ");
+		st=StrGet(" Gate: ");
 		if (!*st) {
 			Free(st);
 			return;
diff --git a/src/Apps/Psalmody/PsalmodyMain.CC b/src/Apps/Psalmody/PsalmodyMain.CC
index 79c0272b..9ae1bd24 100755
--- a/src/Apps/Psalmody/PsalmodyMain.CC
+++ b/src/Apps/Psalmody/PsalmodyMain.CC
@@ -76,7 +76,7 @@ U0 PsmRightClick(I64 x,I64 y)
 						else
 							st2=MStrPrint("\nWord(\"\"):");
 						DocBottom;
-						st=GetStr(st2);
+						st=StrGet(st2);
 						Free(st2);
 						Free(tmpn->word);
 						if (*st) {
diff --git a/src/Apps/TimeClock/TimeClk.CC b/src/Apps/TimeClock/TimeClk.CC
index 12cc2f36..3ce12579 100755
--- a/src/Apps/TimeClock/TimeClk.CC
+++ b/src/Apps/TimeClock/TimeClk.CC
@@ -124,7 +124,7 @@ public U0 PunchOut()
 		tmpt->type=TET_PUNCH_OUT;
 		tmpt->datetime=Now;
 		"\nEnter Description.\nPress <ESC> when done.\n";
-		if (!(tmpt->desc=GetStr(,,GSF_WITH_NEW_LINE)))
+		if (!(tmpt->desc=StrGet(,,GSF_WITH_NEW_LINE)))
 			tmpt->desc=CAlloc(1);
 		QueueInsert(tmpt,header->last);
 		TimeFileWrite(header);
@@ -142,7 +142,7 @@ public U0 PunchIn()
 		tmpt->type=TET_PUNCH_IN;
 		tmpt->datetime=Now;
 		"\nEnter Description.\nPress <ESC> when done.\n";
-		if (!(tmpt->desc=GetStr(,,GSF_WITH_NEW_LINE)))
+		if (!(tmpt->desc=StrGet(,,GSF_WITH_NEW_LINE)))
 			tmpt->desc=CAlloc(1);
 		QueueInsert(tmpt,header->last);
 		TimeFileWrite(header);
diff --git a/src/Compiler/CMisc.CC b/src/Compiler/CMisc.CC
index 22a55527..8adc6506 100755
--- a/src/Compiler/CMisc.CC
+++ b/src/Compiler/CMisc.CC
@@ -149,7 +149,7 @@ U8 *CmdLinePrompt()
 		RawDr;
 
 	LBts(&Fs->task_flags,TASKf_CMD_LINE_PROMPT);
-	st=GetStr(,,GSF_SHIFT_ESC_EXIT);
+	st=StrGet(,,GSF_SHIFT_ESC_EXIT);
 	LBtr(&Fs->task_flags,TASKf_CMD_LINE_PROMPT);
 
 	i=StrLen(st);
diff --git a/src/Demo/AcctExample/PersonalNotes.DD b/src/Demo/AcctExample/PersonalNotes.DD
index c0cb9f88..e0f0bca7 100755
--- a/src/Demo/AcctExample/PersonalNotes.DD
+++ b/src/Demo/AcctExample/PersonalNotes.DD
@@ -77,7 +77,7 @@ $WW,1$$FG,5$$TX+CX,"TODO"$$FG$
 * 12/25/2015 Copy-Paste index.html glitch if source window 40 columns.
 * 01/06/2016 Editor filter "str" applied to output from LineRep looks broken.
 
-* Document, perhaps with video, $LK,"GetStr",A="MN:GetStr"$() all the way down into $LK,"PutKey",A="MN:PutKey"$() code.
+* Document, perhaps with video, $LK,"StrGet",A="MN:StrGet"$() all the way down into $LK,"PutKey",A="MN:PutKey"$() code.
 
 * Better dictionary.
 * Good spell checker.
@@ -379,7 +379,7 @@ $FG,5$$TX+CX,"Test"$$FG$
 * Return ress for $LK,"GrBlot",A="MN:GrBlot"$, $LK,"GrRect",A="MN:GrRect"$, $LK,"GrPutChar",A="MN:GrPutChar"$?
 * Collision counts for $LK,"GrBlot",A="MN:GrBlot"$, $LK,"GrRect",A="MN:GrRect"$, $LK,"GrPutChar",A="MN:GrPutChar"$?
 
-* $LK,"GetStr",A="MN:GetStr"$() or $LK,"GetChar",A="MN:GetChar"$() in $LK,"OSInstall",A="FI:::/Misc/OSInstall.CC"$ didn't like focus change.
+* $LK,"StrGet",A="MN:StrGet"$() or $LK,"GetChar",A="MN:GetChar"$() in $LK,"OSInstall",A="FI:::/Misc/OSInstall.CC"$ didn't like focus change.
 
 * Test on Dad's computer or other people's?
 
diff --git a/src/Demo/Define.CC b/src/Demo/Define.CC
index 9c2678f5..1880a2d6 100755
--- a/src/Demo/Define.CC
+++ b/src/Demo/Define.CC
@@ -22,7 +22,7 @@ Bool Quit()
 	I64 i;
 	while (TRUE) {
 		"%S %S?","ST_EXIT","ST_YES_NO";
-		st=GetStr;
+		st=StrGet;
 		i=DefineMatch(st,"ST_NO_YES_LIST",LMF_IGNORE_CASE);
 		if (i>=0) {
 			res=i;
diff --git a/src/Demo/Graphics/Cartesian.CC b/src/Demo/Graphics/Cartesian.CC
index 012ba9ae..eedd21b6 100755
--- a/src/Demo/Graphics/Cartesian.CC
+++ b/src/Demo/Graphics/Cartesian.CC
@@ -14,7 +14,7 @@ U0 Cartesian()
 		"Enter algebraic equation to graph.\n"
 					"Example: y=2*x\n"
 					"y=";
-		if (st=GetStr) {
+		if (st=StrGet) {
 			if (*st) {
 				h=Fs->pix_width/2;
 				v=Fs->pix_height/2;
diff --git a/src/Demo/Lectures/MiniCompiler.CC b/src/Demo/Lectures/MiniCompiler.CC
index 760c3d00..d14a629d 100755
--- a/src/Demo/Lectures/MiniCompiler.CC
+++ b/src/Demo/Lectures/MiniCompiler.CC
@@ -206,7 +206,7 @@ U0 Main()
 		"This will compile an expression\n"
 					"consisting of ints, parentheses\n"
 					"and the operators +,-,* and /.\n";
-		src=GetStr;
+		src=StrGet;
 		if (*src) {
 			src2=src;
 			dst=code;
diff --git a/src/Demo/PhoneNumWords.CC b/src/Demo/PhoneNumWords.CC
index 393a270c..5dc7a1bb 100755
--- a/src/Demo/PhoneNumWords.CC
+++ b/src/Demo/PhoneNumWords.CC
@@ -53,7 +53,7 @@ U0 PhoneNumWords(U8 *num)
 U0 PNWDemo()
 {
 	U8 *st;
-	while ((st=GetStr("Phone Num:")) && *st) {
+	while ((st=StrGet("Phone Num:")) && *st) {
 		PhoneNumWords(st);
 		Free(st);
 	}
diff --git a/src/Demo/Prompt.CC b/src/Demo/Prompt.CC
index c4dd70a7..fffa067b 100755
--- a/src/Demo/Prompt.CC
+++ b/src/Demo/Prompt.CC
@@ -14,7 +14,7 @@ U0 PromptDemo()
 	d=GetF64("Enter float expression(%12g):",1.2e3);
 	"Float=%e\n",d;
 
-	name=GetStr("Name (%s):","John");
+	name=StrGet("Name (%s):","John");
 	"Name:%s\n",name;
 	Free(name);
 
diff --git a/src/Demo/SuggestSpelling.CC b/src/Demo/SuggestSpelling.CC
index 8289fba5..faa3d141 100755
--- a/src/Demo/SuggestSpelling.CC
+++ b/src/Demo/SuggestSpelling.CC
@@ -57,7 +57,7 @@ U0 SuggestSpellingDemo()
 {
 	U8 *w;
 	while (TRUE) {
-		w=GetStr("Word:");
+		w=StrGet("Word:");
 		if (*w) {
 			SuggestSpelling(w);
 			Free(w);
diff --git a/src/Doc/ChangeLog.DD b/src/Doc/ChangeLog.DD
index 80aab20f..e7ebc926 100755
--- a/src/Doc/ChangeLog.DD
+++ b/src/Doc/ChangeLog.DD
@@ -1,4 +1,9 @@
 $WW,1$$FG,5$$TX+CX,"ChangeLog"$$FG$
+$IV,1$----03/16/20 14:44:00----$IV,0$
+* Renamed GetStr() -> $LK,"StrGet",A="MN:StrGet"$().
+
+* Added some $LK,"AHCI headers",A="MN:AHCI_SIG_ATA"$.
+
 $IV,1$----03/12/20 22:00:36----$IV,0$
 * Added $LK,"PaletteSetGruvboxDark",A="MN:PaletteSetGruvboxDark"$().
 
diff --git a/src/Home/K.CC b/src/Home/K.CC
index 30cd0822..f2406881 100755
--- a/src/Home/K.CC
+++ b/src/Home/K.CC
@@ -1,6 +1,6 @@
 Ed("/Doc/ChangeLog.DD");
 
-In("CC\n\n1\n\n6\n\n\n");
+In("CC\n\n1\n\n5\n\n\n");
 BootHDIns;
 "\n\nSuccessful? ";
 if(YorN)
diff --git a/src/Home/Net/ARP.CC b/src/Home/Net/ARP.CC
new file mode 100644
index 00000000..3f99ce1c
--- /dev/null
+++ b/src/Home/Net/ARP.CC
@@ -0,0 +1,235 @@
+#include "PCNet"
+#include "Ethernet"
+
+#define ARP_HASHTABLE_SIZE	1024
+
+#define HTT_ARP	0x00100	//identical to HTT_DICT_WORD
+
+#define ARP_REQUEST	0x01
+#define ARP_REPLY	0x02
+
+class CARPHeader
+{
+	U16	hardware_type;
+	U16	protocol_type;
+
+	U8	hardware_addr_len;
+	U8	protocol_addr_len;
+
+	U16	operation;
+
+	U8	sender_hardware_addr[MAC_ADDRESS_LENGTH];
+	U32	sender_protocol_addr;
+
+	U8	target_hardware_addr[MAC_ADDRESS_LENGTH];
+	U32	target_protocol_addr;
+
+};
+
+class CARPHash:CHash
+{	//store U32 ip_address as CHash->str U8*, MStrPrint("%d")
+//	U32 ip_address;
+	U8	mac_address[MAC_ADDRESS_LENGTH];
+};
+
+class CARPGlobals
+{
+	U32	local_ipv4; // stored in Big Endian
+
+} arp_globals;
+
+CHashTable *arp_cache = NULL;
+
+U0 ARPCacheInit()
+{
+	arp_cache = HashTableNew(ARP_HASHTABLE_SIZE);
+	arp_globals.local_ipv4 = 0;
+}
+
+
+I64 ARPSend(U16 operation,
+			U8 *dest_mac_address,
+			U8 *send_mac_address,
+			U32 send_ip,
+			U8 *target_mac_address,
+			U32 target_ip)
+{//method currently assumes send_ and target_ip EndianU16 already...
+
+	U8* ethernet_frame;
+	I64 de_index = EthernetFrameAllocate(&ethernet_frame,
+										send_mac_address,
+										dest_mac_address,
+										ETHERTYPE_ARP,
+										sizeof(CARPHeader));
+	if (de_index < 0) return de_index;// error state
+
+	CARPHeader *header = ethernet_frame;
+
+	header->hardware_type = EndianU16(HTYPE_ETHERNET);
+	header->protocol_type = EndianU16(ETHERTYPE_IPV4);
+
+	header->hardware_addr_len = MAC_ADDRESS_LENGTH;
+	header->protocol_addr_len = IP_ADDRESS_LENGTH;
+
+	header->operation = EndianU16(operation);
+
+	MemCopy(header->sender_hardware_addr, send_mac_address, MAC_ADDRESS_LENGTH);
+	header->sender_protocol_addr = send_ip;
+
+	MemCopy(header->target_hardware_addr, target_mac_address, MAC_ADDRESS_LENGTH);
+	header->target_protocol_addr = target_ip;
+
+	EthernetFrameFinish(de_index);
+	return 0;
+}
+
+CARPHash *ARPCacheFindByIP(U32 ip_address)
+{
+	U8 *ip_string = MStrPrint("%d", ip_address);
+	CARPHash *entry = HashFind(ip_string, arp_cache, HTT_ARP);
+	if (entry == NULL)
+		ZenithErr("Could not find an IP in ARP cache.");
+
+	Free(ip_string);
+	return entry;
+}
+
+CARPHash *ARPCachePut(U32 ip_address, U8 *mac_address)
+{
+	CARPHash *entry = ARPCacheFindByIP(ip_address);
+	Free(entry);
+
+	entry = CAlloc(sizeof(CARPHash));
+	entry->str = MStrPrint("%d", ip_address);
+	MemCopy(entry->mac_address, mac_address, 6);
+	return entry;
+}
+
+U0 ARPSetIPV4Address(U32 ip_address)
+{ // takes in little endian IP, stores into globals as Big Endian
+	arp_globals.local_ipv4 = EndianU32(ip_address);
+
+	ARPSend(ARP_REPLY,
+			ethernet_globals.ethernet_broadcast,
+			EthernetGetMAC(),
+			arp_globals.local_ipv4,
+			ethernet_globals.ethernet_broadcast,
+			arp_globals.local_ipv4);
+}
+
+
+
+//ARP Handler? Takes an eth_frame CEthFrame* ?
+//Seems like a weird way to do this,
+//and then it goes into a a RegisterL3Protocol
+//function that does some function-handler
+//magic. Idk why it _has_ to do that, it seems
+//like a choice they made. I really do wonder if
+//their is a slicker way to implement this.
+//Less of this fucky function syntax mess.
+
+//We'll just make the ARP handle function
+//and directly call it based on a switch in
+//the NetQueueHandler
+I64 ARPHandler(CEthernetFrame *ethernet_frame)
+{
+	// shrine checks if frame ethertype is ARP and ensures length is not less than CARPHeader
+	// since revising Shrine implement, will do same checks for now ..
+	if (ethernet_frame->ethertype != ETHERTYPE_ARP)
+	{
+		ZenithErr("ARP Handler caught wrong frame ethertype.");
+		return -1; // External use of ARPHandler must account for -1 error codes
+	}
+	if (ethernet_frame->length < sizeof(CARPHeader))
+	{
+		ZenithErr("ARP Handler caught wrong frame length.");
+		return -1; // External use of ARPHandler must account for -1 error codes
+	}
+
+
+	CARPHeader *header = ethernet_frame->data;
+	U16 operation = EndianU16(header->operation);
+
+	// shrine checks to ensure header->htype is 1,
+	// EndianU16(header->protocol_type) == ethertype ipv4,
+	// hlen(?) != 6(?), and that plen(?) == 4 (?)
+	if (EndianU16(header->hardware_type) != HTYPE_ETHERNET)
+	{
+		ZenithErr("ARP Handler caught wrong frame hardware type.");
+		return -1; // External use of ARPHandler must account for -1 error codes
+	}
+
+	if (EndianU16(header->protocol_type) != ETHERTYPE_IPV4)
+	{
+		ZenithErr("ARP Handler caught wrong frame protocol type.");
+		return -1; // External use of ARPHandler must account for -1 error codes
+	}
+	if (header->hardware_addr_len != HLEN_ETHERNET)
+	{
+		ZenithErr("ARP Handler caught wrong frame hardware address length.");
+		return -1; // External use of ARPHandler must account for -1 error codes
+	}
+	if (header->protocol_addr_len != PLEN_IPV4)
+	{
+		ZenithErr("ARP Handler caught wrong frame protocol address length.");
+		return -1; // External use of ARPHandler must account for -1 error codes
+	}
+
+
+
+	switch (operation)
+	{
+		case ARP_REQUEST:
+			if (header->target_protocol_addr == arp_globals.local_ipv4)
+				ARPSend(ARP_REPLY,
+						header->sender_hardware_addr,
+						EthernetGetMAC,
+						arp_globals.local_ipv4,
+						header->sender_hardware_addr, header->sender_protocol_addr);
+			break;
+		case ARP_REPLY:
+			ARPCachePut(EndianU32(header->sender_protocol_addr), header->sender_hardware_addr);
+			break;
+	}
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/Home/Net/Ethernet.CC b/src/Home/Net/Ethernet.CC
new file mode 100644
index 00000000..430a0b3b
--- /dev/null
+++ b/src/Home/Net/Ethernet.CC
@@ -0,0 +1,52 @@
+class CEthernetFrame {
+	U8	source_address[6];
+	U8	padding[2];
+	U8	destination_address[6];
+	U16	ethertype;
+
+	U8 *data;
+
+	I64 length;
+};
+
+class CEthernetGlobals
+{
+	U8 ethernet_null[6];
+	U8 ethernet_broadcast[6];
+
+} ethernet_globals;
+
+U0 EthernetInitGlobals()
+{
+	I64 i;
+	for (i=0;i<6;i++)
+	{
+		ethernet_globals.ethernet_null[i] = 0;
+		ethernet_globals.ethernet_broadcast[i] = 0xFF;
+	}
+}
+
+
+
+
+//This method is retarded. It needs help.
+U0 EthernetFrameParse(CEthernetFrame *frame_out, U8 *frame, U16 length)
+{
+	//Shrine has a FIXME for check length! We need to figure out what
+	//lengths are appropriate ...... Shrine also says MemCopy has a
+	//high overhead. I'm almost tempted to say that means that a lot
+	//of the current system should be done with less extra allocation
+	//altogether, more passing.
+
+	MemCopy(frame_out->destination_address, frame, 6); // 6 ? Why 6? Need a #define...
+
+	MemCopy(frame_out->source_address, frame + 6, 6); // Ridiculous, what are those
+
+	frame_out->ethertype = frame[13] | (frame[12] << 8); // This would be readable with #defines
+
+	frame_out->data = frame + 14; // Fuck you Shrine
+
+	frame_out->length = length - 14 + 4;	//... He has a comment literally just saying "??". Wow.
+}
+
+EthernetInitGlobals;
\ No newline at end of file
diff --git a/src/Home/Net/MappingShrineAlgs.DD b/src/Home/Net/MappingShrineAlgs.DD
new file mode 100644
index 0000000000000000000000000000000000000000..d7098cd51b2e8d6a610a607c90b1312c936d38bb
GIT binary patch
literal 1074
zcmZ`&&ubGw6rPHgjCa9o506mNr0fQ3un1{`Ha4~x+F~1|sDvSz&92=a>CP-^`VZ*I
zn->p)2f=?q!Mg|j54?&0f*#{H*`$$(%f5YY-@KXkee=zn_@`2FzH)SE7dF@H1$%pM
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z*Z`(r%NJn(6oEncdK&-Ri&;aAg{T8kkthkMB9!DuI;O^s_L`I5;8tgn2eeR}N@}#K
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z8|;zn<5<aLt`D<*ApafakcM^(APp$cTf|hEDy=XU$>HCE8*LLYP~_|Em;f`)w5Qd{
z{;Z-%DCPGfQ>Ny7f~+}bB3vk#^`8y1{3d9=1L^~a`UT#4i{LYYlJ+1AUN0Wba4SxI
e+^(#p>{ZIl`h|mV8|Bc_#m(wWJ9NxdV(bs=Xfp%=

literal 0
HcmV?d00001

diff --git a/src/Home/Net/Net.HH b/src/Home/Net/Net.HH
new file mode 100644
index 00000000..8b0e6af6
--- /dev/null
+++ b/src/Home/Net/Net.HH
@@ -0,0 +1,21 @@
+//Generic Networking definitions
+
+#define ETHERNET_MIN_FRAME_SIZE		46
+#define ETHERNET_MAC_HEADER_LENGTH	14
+#define ETHERNET_ETHERTYPE_OFFSET	12
+#define ETHERNET_DATA_OFFSET		14
+#define MAC_ADDRESS_LENGTH			6
+
+/*	Ethernet Frame Size.
+	Linux uses 1544, OSDev and Shrine use 1548. Based on IEEE 802.3as, max frame size was agreed upon as 2000 bytes. */
+#define ETHERNET_FRAME_SIZE	2000
+
+#define HTYPE_ETHERNET	1
+#define HLEN_ETHERNET	6
+#define PLEN_IPV4		4
+
+#define ETHERTYPE_IPV4	0x0800
+#define ETHERTYPE_ARP	0x0806
+
+#define IP_ADDRESS_LENGTH	4
+
diff --git a/src/Home/Net/NetFuncSummary.DD b/src/Home/Net/NetFuncSummary.DD
new file mode 100644
index 00000000..038827b8
--- /dev/null
+++ b/src/Home/Net/NetFuncSummary.DD
@@ -0,0 +1,73 @@
+PCNet
+	PCNetPCIDevFind
+	PCNetGetIOBase
+	PCNetReset
+	PCNetEnter32BitMode
+	PCNetWriteRAP
+	PCNetWriteCSR
+	PCNetReadCSR
+	PCNetSetSWStyle
+	PCNetGetMAC
+	PCNetInitDescriptorEntry
+	PCNetAllocateBuffers
+	PCNetDirectInit
+	PCNetSetInterruptCSR
+	PCNetEnableTXAutoPad
+	PCNetExitConfigMode
+	PCNetDriverOwns
+	PCNetAllocateTransmitPacket
+	PCNetFinishTransmitPacket
+	PCNetReceivePacket
+	PCNetReleasePacket
+	PCNetIRQ
+	PCIRerouteInterrupts
+	PCNetSetupInterrupts
+	PCNetInit
+
+	EthernetFrameFinish (driver alias of PCNetFinishTransmitPacket)
+	EthernetFrameAllocate
+	EthernetGetMAC
+	
+
+NetQueue
+	NetQueueInit
+	NetQueuePull
+	NetQueuePushCopy
+
+
+Ethernet
+	EthernetFrameParse (Needs refining!)
+
+
+ARP
+	ARPCacheInit
+	ARPSend
+	ARPCacheFindByIP
+	ARPCachePut
+	ARPHandler
+	ARPSetIPV4Address
+
+
+Sockets
+
+
+IPV4
+
+
+ICMP
+
+
+TCP
+
+
+UDP
+
+
+DNS
+
+
+NetHandlerTask
+	NetHandlerTask
+	HandleNetQueueEntry	(4 million context swaps per second!)
+
+NetConfig
\ No newline at end of file
diff --git a/src/Home/Net/NetHandlerTask.CC b/src/Home/Net/NetHandlerTask.CC
new file mode 100644
index 00000000..38edf7f8
--- /dev/null
+++ b/src/Home/Net/NetHandlerTask.CC
@@ -0,0 +1,35 @@
+
+U0 HandleNetQueueEntry(CNetQueueEntry *entry)
+{
+	CEthernetFrame ethernet_frame;
+
+	EthernetFrameParse(&ethernet_frame, entry->frame, entry->length);
+
+	switch (ethernet_frame.ethertype)
+	{
+		case ETHERTYPE_ARP:
+			ARPHandler(&ethernet_frame);
+			break;
+	}
+}
+
+U0 NetHandlerTask(I64)
+{
+	while (TRUE)
+	{
+		CNetQueueEntry *entry = NetQueuePull;
+
+		if (entry)
+		{
+			HandleNetQueueEntry(entry);
+		}
+		else
+		{
+			LBts(&Fs->task_flags, TASKf_SUSPENDED);
+			Yield;
+		}
+			
+	}
+}
+
+net_handler_task = Spawn(&NetHandlerTask, NULL, "NetQueueHandler",,);
\ No newline at end of file
diff --git a/src/Home/Net/NetQueue.CC b/src/Home/Net/NetQueue.CC
new file mode 100644
index 00000000..cf088035
--- /dev/null
+++ b/src/Home/Net/NetQueue.CC
@@ -0,0 +1,85 @@
+//Shrine mentions possibly using two FIFOs (in our case, Queues) for pending and empty frames.
+//If logical to implement, perhaps Zenith NetQueue code should do something similar to that idea.
+
+//Each Ethernet Frame will be represented as an entry in a CQueue.
+class CNetQueueEntry:CQueue
+{
+	I64 length; //todo: change to packet_length?
+	U8 frame[ETHERNET_FRAME_SIZE];
+};
+
+
+/*	global variable, holds pointer of Ethernet Queue.
+	This acts as the Head of the Queue, Entries act
+	as the Tail of the Queue. 
+	Upon QueueInit, ->next and ->last are set to
+	itself, the Head. */
+CQueue *net_queue; // no QueueRemove the Head! only Entries!
+
+//Net Handler Task is set idle and active depending on if entries in Net Queue. See NetHandlerTask.CC 
+CTask *net_handler_task = NULL;
+
+U0 NetQueueInit()
+{
+	net_queue = CAlloc(sizeof(CQueue));
+	QueueInit(net_queue);
+}
+
+CNetQueueEntry *NetQueuePull()
+{//Returns a pointer to a CNetQueueEntry, or NULL pointer if Net Queue is empty.
+	CNetQueueEntry *entry;
+
+	if (net_queue->next != net_queue)
+	{
+		entry = net_queue->next;
+		QueueRemove(entry);
+	}
+	else // Queue is empty if head->next is head itself.
+		entry = NULL;
+
+	return entry;
+}
+
+U0 NetQueuePushCopy(U8 *data, I64 length)
+{/*	Pushes a copy of the packet data and length
+	into the Net Queue. The NetQueueEntry is inserted
+	after the last entry of net_queue to keep new
+	items in the back of the Queue, old in front. */ 
+	CNetQueueEntry *entry = CAlloc(sizeof(CNetQueueEntry));
+
+	entry->length = length;
+	MemCopy(entry->frame, data, length);
+
+	QueueInsert(entry, net_queue->last);
+
+	//Set Net Handler Task active.
+	if (net_handler_task)
+		LBtr(&net_handler_task->task_flags, TASKf_SUSPENDED);
+
+
+}
+
+NetQueueInit;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/Home/Net/NetQueueDiagram.DD b/src/Home/Net/NetQueueDiagram.DD
new file mode 100644
index 0000000000000000000000000000000000000000..a1a2a09b9923eaea664ae8c9f3320c9d160e1030
GIT binary patch
literal 295
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literal 0
HcmV?d00001

diff --git a/src/Home/Net/NetworkingNotes.DD b/src/Home/Net/NetworkingNotes.DD
new file mode 100644
index 00000000..d13aaf63
--- /dev/null
+++ b/src/Home/Net/NetworkingNotes.DD
@@ -0,0 +1,56 @@
+$BG,0$$FG,15$Zenith Networking Stack Notes$FG,0$$BG,15$
+
+Departures from Shrine:
+
+	ARP Cache is Hashtable. Keys are U32 ip addresses to "%d" string.
+
+	NetFIFO is NetQueue. If problems arise, maybe set a #define max
+	for the length of the Queue.
+
+	Not defining ntohl and friends. Using Endian functions.
+
+	Many file global vars have been condensed into global classes.
+
+Stack progress: (# done, ~ WIP, . N/A)
+
+	# PCNet-II Driver
+
+	# NetQueue
+		- no NetHandler currently
+
+	~ Ethernet
+		- need frame parse method
+
+	# ARP (Address Resolution Protocol)
+		- double check.
+
+	. Sockets
+		- thinking I should nix Sockets and
+		work out a STREAMS protocol instead.
+		Need more docs on STREAMS.
+
+
+	. IPV4 (Internet Protocol version 4)
+
+	. ICMP (Internet Control Message Protocol)
+
+	. TCP (Transmission Control Protocol)
+
+	. UDP (User Datagram Protocol)
+
+	. DNS (Domain Name System)
+
+	. NetHandlerTask
+		- thinking maybe for this, instead of using this whole
+		handler function pointer nonsense, it can be done
+		more seamlessly with a switch(ethertype). Shrine
+		version just looks and seems wrong. Must be better way. 
+
+		- I'm thinking this is the better way:
+			We include the NetQueue handler as late as
+			possible, allowing all of the other layers of the
+			stack to already have their handle functions
+			made so we can just do a switch (ethertype) and
+			then directly call the appropriate handler.
+
+	. NetConfig
\ No newline at end of file
diff --git a/src/Home/Net/PCNet.CC b/src/Home/Net/PCNet.CC
new file mode 100644
index 00000000..64fd1f8f
--- /dev/null
+++ b/src/Home/Net/PCNet.CC
@@ -0,0 +1,508 @@
+/*	AMD PCNetII Driver
+	Author: TomAwezome
+
+	Driver is based on:
+	-	minexew's ShrineOS PCNet.CC implementation
+	-	OSDev AMD_PCNET documentation
+	-	AMD PCnet(TM)-PCI datasheet
+	-	any other useful sources.
+
+	Guidelines:
+	-	Magic numbers are bad. #defines are good.
+	-	Understandability over LOC.
+	-	Clear documentation.
+*/
+
+#include "Net/Net.HH"
+#include "Net/NetQueue"
+
+#define	PCNET_DEVICE_ID	0x2000
+#define	PCNET_VENDOR_ID	0x1022
+
+#define	PCI_REG_COMMAND	0x04
+
+#define	PCNET_CMDf_IOEN	0
+#define	PCNET_CMDf_BMEN	2
+
+#define PCNET_CMDF_IOEN	(1 << PCNET_CMDf_IOEN)
+#define PCNET_CMDF_BMEN	(1 << PCNET_CMDf_BMEN)
+
+#define PCNET_WD_RESET	0x14 // reset reg location when card is in 16-bit mode
+
+#define PCNET_DW_RDP	0x10
+#define PCNET_DW_RAP	0x14
+#define PCNET_DW_RESET	0x18 // reset reg location when card is in 32-bit mode
+
+#define PCNET_CSR_CTRLSTATUS	0
+#define PCNET_CSR_INTERRUPTS	3
+#define PCNET_CSR_FEATURECTRL	4
+#define PCNET_CSR_LADRF0		8
+#define PCNET_CSR_LADRF1		9
+#define PCNET_CSR_LADRF2		10
+#define PCNET_CSR_LADRF3		11
+#define PCNET_CSR_PADR0			12
+#define PCNET_CSR_PADR1			13
+#define PCNET_CSR_PADR2			14
+#define PCNET_CSR_MODE			15
+#define PCNET_CSR_BADRL			24
+#define PCNET_CSR_BADRU			25
+#define PCNET_CSR_BADTL			30
+#define PCNET_CSR_BADTU			31
+#define PCNET_CSR_POLLINT		47
+#define PCNET_CSR_SOFTWARESTYLE	58
+#define PCNET_CSR_RXRINGLEN		76
+#define PCNET_CSR_TXRINGLEN		78
+
+#define PCNET_SWSTYLE_SELECTION	2 // AMD PCNet datasheet p. 1-968
+
+// Refer to AMD PCNet datasheet p. 1-954, 1-956, 1-957 for Interrupt Mask details.
+#define PCNET_INT_BSWP		2	// Byte Swap (Big-Endian / Little-Endian)
+#define PCNET_INT_IDONM		8	// Initialization Done Mask
+#define PCNET_INT_TINTM		9	// Transmit Interrupt Mask
+#define PCNET_INT_RINTM		10	// Receive Interrupt Mask
+
+#define PCNET_FEATURE_APADXMT	11
+
+#define PCNET_CTRL_INIT	0
+#define PCNET_CTRL_STRT	1
+#define PCNET_CTRL_STOP	2
+#define PCNET_CTRL_RINT 10
+
+#define PCNET_RX_BUFF_COUNT	32	// Linux & Shrine Driver use 32 and 8 for these, we could allow more if wanted.
+#define PCNET_TX_BUFF_COUNT	8
+
+#define PCNET_DESCRIPTORf_ENP	24
+#define PCNET_DESCRIPTORf_STP	25
+#define PCNET_DESCRIPTORf_OWN	31 // AMD PCNet datasheet p.1-992, 1-994
+//#define PCNET_DESCRIPTORF_OWN	(1 << PCNET_DESCRIPTORf_OWN)
+
+#define INT_DEST_CPU	0
+
+class CPCNet
+{
+	CPCIDev *pci;
+	U64 mac_address; //MAC address is first 6 bytes of PCNet EEPROM	(page # ?)
+
+	I64 current_rx_de_index;	// Current Receive DE being processed.  Gets incremented, wrapped to 0 at max of PCNET_RX_BUFF_COUNT.
+	I64 current_tx_de_index;	// Current Transmit DE being processed. Gets incremented, wrapped to 0 at max of PCNET_TX_BUFF_COUNT.
+
+	U8 *rx_de_buffer;		// Uncached-alias of pointer to the buffer of RX Descriptor Entries.
+	U8 *tx_de_buffer;		// Uncached-alias of pointer to the buffer of TX Descriptor Entries.
+	U8 *rx_de_buffer_phys;	// Pointer to the buffer of RX Descriptor Entries. (Code Heap, lower 2Gb)
+	U8 *tx_de_buffer_phys;	// Pointer to the buffer of TX Descriptor Entries. (Code Heap, lower 2Gb)
+
+	U32 rx_buffer_addr;	// 'Physical address of actual receive buffers  (< 4 Gb)'
+	U32 tx_buffer_addr;	// 'Physical address of actual transmit buffers (< 4 Gb)'
+
+} pcnet; // pcnet is the global variable we store all of this into.
+
+class CPCNetDescriptorEntry
+{/* AMD PCNet datasheet p.1-991 & p.1-994 NOTE: chart typo on 1-994, see ONES and BCNT on 1-995.
+	TX and RX DE's are the same size (16-Bytes) and structure, but have different registers and functions.
+	The RX and TX DE buffers of the CPCNet class are allocated to a certain amount of these DEs. */
+	U32	buffer_addr;
+	U32 status1;
+	U32 status2;
+	U32 reserved;
+};
+
+CPCIDev *PCNetPCIDevFind()
+{// Find and return PCNetII card as a CPCIDev pointer.
+	return PCIDevFind(,,PCNET_VENDOR_ID,PCNET_DEVICE_ID);
+}
+
+U32 PCNetGetIOBase()
+{/* Return memory IO base address of PCNet card. Bits 0-4 are not for the IO base, so an AND NOT 0x1F ignores those bits. */
+	U32 io_base = pcnet.pci->base[0] & ~0x1F;
+	return io_base;
+}
+
+U0 PCNetReset()
+{/* Reads the 32- and 16-bit RESET registers, which,
+	regardless of which mode the card is in, will reset it back to 16-bit mode. */
+	InU32(PCNetGetIOBase + PCNET_DW_RESET);
+	InU16(PCNetGetIOBase + PCNET_WD_RESET);
+	Busy(5); // OSDev says minimum 1 æS
+}
+
+U0 PCNetEnter32BitMode()
+{/* AMD PCNet datasheet p. 1-930
+	Summary: A 32-bit write (while in 16-bit mode) to RDP will cause 16-bit mode exit and immediate entry into 32-bit mode. */
+	OutU32(PCNetGetIOBase + PCNET_DW_RDP, 0);
+}
+
+U0 PCNetWriteCSR(U32 csr, U32 value)
+{/* AMD PCNet datasheet p. 1-952
+	Summary: Control and Status Registers are accessed via the RDP (Register Data Port).
+	Which CSR is selected is based on the value in the RAP (Register Address Port). */
+	OutU32(PCNetGetIOBase + PCNET_DW_RAP, csr);
+	OutU32(PCNetGetIOBase + PCNET_DW_RDP, value);
+}
+
+U32 PCNetReadCSR(U32 csr)
+{/* AMD PCNet datasheet p. 1-952
+	Summary: Control and Status Registers are accessed via the RDP (Register Data Port).
+	Which CSR is selected is based on the value in the RAP. */
+	OutU32(PCNetGetIOBase + PCNET_DW_RAP, csr);
+	return InU32(PCNetGetIOBase + PCNET_DW_RDP);
+}
+
+U0 PCNetSetSWStyle()
+{/* AMD PCNet datasheet p. 1-968
+	In CSR58 (Software Style), the 8-bit SWSTYLE register dictates interpretation of certain bits in the CSR space,
+	and widths of descriptors and initialization block.
+	In PCNet-PCI mode, CSR4 bits function as defined in the datasheet, and TMD1[29] functions as ADD_FCS. */
+	U32 csr = PCNetReadCSR(PCNET_CSR_SOFTWARESTYLE);
+
+	csr &= ~0xFF; // clears first 8 bits: SWSTYLE 8-bit register.
+	csr |= PCNET_SWSTYLE_SELECTION; // set SWSTYLE to PCNet-PCI mode.
+
+	PCNetWriteCSR(PCNET_CSR_SOFTWARESTYLE, csr);
+}
+
+U0 PCNetGetMAC()
+{/* AMD PCNet datasheet p. 1-887, 1-931, 1-937
+	MAC address stored at first 6 bytes of PCNet EEPROM.
+	EEPROM addresses shadow-copied to APROM at hardware init. APROM accessible at first 16 bytes of PCI IO space. */
+	I64 i;
+	for (i = 0; i < 6; i++)
+		pcnet.mac_address.u8[i] = InU8(PCNetGetIOBase + i);
+}
+
+U0 PCNetInitDescriptorEntry(CPCNetDescriptorEntry *entry, U32 buffer_addr, I64 is_rx)
+{
+	entry->buffer_addr = buffer_addr;
+	/*	AMD PCNet datasheet p.1-991.
+		BCNT is the usable buffer length, expressed as first 12 bits of 2s-complement of desired length.
+		Bits 0-11 of a DE are for the buffer byte count (BCNT),and bits 12-15 of a DE must be written all ones (ONES)*/
+	entry->status1 |= -ETHERNET_MIN_FRAME_SIZE & 0xFFF;	//Sets BCNT reg (first 12 bits) in DE TMD1/RMD1, as 2s complement of the desired length.
+	entry->status1 |= 0xF000;						// Sets bits 12-15 (ONES) in DE TMD1/RMD1  as all ones.
+	//if this is a Receive DE, give ownership to the card so the PCNet can fill them.
+	if (is_rx) Bts(&entry->status1, PCNET_DESCRIPTORf_OWN);
+	ClassRep(entry);
+}
+
+U0 PCNetAllocateBuffers()
+{
+	I64 de_index; // used in for loops for TX and RX DE access.
+
+	/*	AMD PCNet datasheet p.1-913, p.1-990
+		When SSIZE32 = 1, Descriptor Ring Entry Base Address must be on 16-byte boundary. (TDRA[3:0] = 0, RDRA[3:0] = 0) */
+	pcnet.rx_de_buffer_phys = CAllocAligned(sizeof(CPCNetDescriptorEntry) * PCNET_RX_BUFF_COUNT, 16, Fs->code_heap);
+	pcnet.tx_de_buffer_phys = CAllocAligned(sizeof(CPCNetDescriptorEntry) * PCNET_TX_BUFF_COUNT, 16, Fs->code_heap);
+
+	//Shrine does a check and returns -1 here, if the end of either buffer exceeds 0x100000000
+
+	pcnet.rx_de_buffer = dev.uncached_alias + pcnet.rx_de_buffer_phys; // we want uncached
+	pcnet.tx_de_buffer = dev.uncached_alias + pcnet.tx_de_buffer_phys; // access to these.
+
+	pcnet.rx_buffer_addr = CAlloc(ETHERNET_MIN_FRAME_SIZE * PCNET_RX_BUFF_COUNT, Fs->code_heap);//Shrine has a TODO to figure out
+	pcnet.tx_buffer_addr = CAlloc(ETHERNET_MIN_FRAME_SIZE * PCNET_TX_BUFF_COUNT, Fs->code_heap);//if these should be uncached too.
+	//note, p.1-991,1-994: RBADR is only 32 bits wide.
+
+	//Shrine does a check and returns -1 here, if the end of either buffer exceeds 0x100000000
+
+	CPCNetDescriptorEntry *entry = pcnet.rx_de_buffer;
+	for (de_index = 0; de_index < PCNET_RX_BUFF_COUNT; de_index++)
+		PCNetInitDescriptorEntry(&entry[de_index], pcnet.rx_buffer_addr, TRUE); // TRUE for is_rx.
+
+	entry = pcnet.tx_de_buffer;
+	for (de_index = 0; de_index < PCNET_TX_BUFF_COUNT; de_index++)
+		PCNetInitDescriptorEntry(&entry[de_index], pcnet.tx_buffer_addr, FALSE); // FALSE for is_rx.	
+}
+
+U0 PCNetDirectInit()
+{/* AMD PCNet datasheet p. 1-1021
+	Instead of setting up an initialization block,
+	direct writes to the necessary CSRs can be used to manually initialize the PCNet card. */
+
+	/*	AMD PCNet datasheet p.1-991
+		If Logical Address Filter is set as all 0, all incoming logical addresses are rejected. Disables multicast. */
+	PCNetWriteCSR(PCNET_CSR_LADRF0, 0);
+	PCNetWriteCSR(PCNET_CSR_LADRF1, 0);
+	PCNetWriteCSR(PCNET_CSR_LADRF2, 0);
+	PCNetWriteCSR(PCNET_CSR_LADRF3, 0);
+
+	/*	AMD PCNet datasheet p.1-960, 1-961	
+		The Physical Address is the MAC.
+		The first 16 bits of CSRs 12-14 are for the Physical Address, the upper bits are reserved, written 0 read undefined.*/
+
+	PCNetWriteCSR(PCNET_CSR_PADR0, pcnet.mac_address.u16[0]);
+	PCNetWriteCSR(PCNET_CSR_PADR1, pcnet.mac_address.u16[1]);
+	PCNetWriteCSR(PCNET_CSR_PADR2, pcnet.mac_address.u16[2]);
+
+	/*	AMD PCNet datasheet p.1-961, 1-962, 1-963
+		Refer to datasheet for specifics. Most relevant, when setting Mode to 0, promiscuous mode is is disabled,
+		TX and RX enabled, enable RX broadcast and unicast. */
+	PCNetWriteCSR(PCNET_CSR_MODE, 0);
+
+	/* 	AMD PCNet datasheet p.1-964
+		CSR 24 and 25 need to be filled with the lower and upper 16 bits, respectively, of the address of the RX packet ring. Likewise for
+		CSR 30 and 31 for the TX packet ring.*/
+
+	PCNetWriteCSR(PCNET_CSR_BADRL, pcnet.rx_buffer_addr.u16[0]);
+	PCNetWriteCSR(PCNET_CSR_BADRU, pcnet.rx_buffer_addr.u16[1]);
+
+	PCNetWriteCSR(PCNET_CSR_BADTL, pcnet.tx_buffer_addr.u16[0]);
+	PCNetWriteCSR(PCNET_CSR_BADTU, pcnet.tx_buffer_addr.u16[1]);
+
+	/*	AMD PCNet datasheet p. 1-967
+		Default value at hardware init is all 0.
+		Standard init block process sets this, but if doing directly it is imperative to manually set it 0. */
+	PCNetWriteCSR(PCNET_CSR_POLLINT, 0);
+
+	/*	AMD PCNet datasheet p. 1-970
+		Receive and Transmit Ring Length CSRs bits 0-15 need to be set as the 2s complement of the ring length.
+		The AND with 0xFFFF clears the upper Reserved bits, which are to be written as zeroes read undefined. */
+	PCNetWriteCSR(PCNET_CSR_RXRINGLEN, -PCNET_RX_BUFF_COUNT & 0xFFFF);
+	PCNetWriteCSR(PCNET_CSR_TXRINGLEN, -PCNET_TX_BUFF_COUNT & 0xFFFF);
+}
+
+U0 PCNetSetInterruptCSR()
+{/* AMD PCNet datasheet p.1-952, 1-953, 1-954, 1-955, 1-956, 1-957
+	Refer to datasheet for specifics on the Interrupt Masks.
+	Most of these, when set 0, allow interrupts to be set in CSR0.
+	We set Big-Endian disabled, RX interrupts enabled, Init Done interrupt disabled, and TX interrupt disabled. */
+	U32 csr = PCNetReadCSR(PCNET_CSR_INTERRUPTS);
+
+	Btr(&csr, PCNET_INT_BSWP);
+	Btr(&csr, PCNET_INT_RINTM);
+
+	Bts(&csr, PCNET_INT_IDONM);
+	Bts(&csr, PCNET_INT_TINTM);
+	
+	PCNetWriteCSR(PCNET_CSR_INTERRUPTS, csr);
+}
+
+U0 PCNetEnableTXAutoPad()
+{/* AMD PCNet datasheet p.1-958
+	Setting bit 11 (Auto Pad Transmit) allows short transmit frames to be automatically extended to 64 bytes. */
+	U32 csr = PCNetReadCSR(PCNET_CSR_FEATURECTRL);
+
+	Bts(&csr, PCNET_FEATURE_APADXMT);
+
+	PCNetWriteCSR(PCNET_CSR_FEATURECTRL, csr);
+
+}
+
+U0 PCNetExitConfigMode()
+{/* AMD PCNet datasheet p.1-954
+	PCNet controller can be started after configuring by ensuring INIT and STOP are cleared and START bit is set in CSR0. */
+	U32 csr = PCNetReadCSR(PCNET_CSR_CTRLSTATUS);
+
+	Btr(&csr, PCNET_CTRL_INIT);
+	Btr(&csr, PCNET_CTRL_STOP);
+
+	Bts(&csr, PCNET_CTRL_STRT);
+
+	PCNetWriteCSR(PCNET_CSR_CTRLSTATUS, csr);
+}
+
+I64 PCNetDriverOwns(CPCNetDescriptorEntry* entry)
+{/* Returns whether the value of the OWN bit of the Descriptor Entry is zero.
+	If 0, driver owns, if 1, PCNet card owns it. */
+	return !Bt(&entry->status1, PCNET_DESCRIPTORf_OWN);
+}
+
+I64 PCNetAllocateTransmitPacket(U8 **packet_buffer_out, I64 length)
+{/* Transmits the packet at the current TX DE index.
+	The packet_buffer_out is a pointer, since we modify its value, ending with returning the index of the DE we just processed.
+	Length is validated to fit in BCNT.
+	The increment of the current TX DE index is done by assigning it the value of incrementing it AND the max DE index - 1.
+	This will increment it as well as wrap back to 0 if we hit the max DE index. */
+
+	I64 de_index = pcnet.current_tx_de_index;
+
+	if (length > 0xFFF)
+	{ // Max packet length must fit into BCNT 12-bit register.
+		ZenithErr("Invalid TX Packet Length");
+		throw('PCNet');
+	}
+
+	CPCNetDescriptorEntry *entry = &pcnet.tx_de_buffer[de_index];
+
+	if (!PCNetDriverOwns(entry))
+	{
+		ZenithErr("TX FIFO Full");
+		return -1; // Positive value expected. Functions calling this must factor this in.
+	}
+
+	Bts(&entry->status1, PCNET_DESCRIPTORf_STP);
+	Bts(&entry->status1, PCNET_DESCRIPTORf_ENP);
+
+	/*	AMD PCNet datasheet p.1-991.
+		BCNT is the usable buffer length, expressed as first 12 bits of 2s-complement of desired length.
+		Bits 0-11 of a DE are for the buffer byte count (BCNT),
+		and bits 12-15 of a DE must be written all ones (ONES) */
+	entry->status1 |= -length & 0xFFF;	// Sets BCNT reg (first 12 bits) in DE TMD1, as 2s complement of the desired length.
+	entry->status1 |= 0xF000;			// Sets bits 12-15 (ONES) in DE TMD1 as all ones.
+
+	pcnet.current_tx_de_index = (pcnet.current_tx_de_index + 1) & (PCNET_TX_BUFF_COUNT - 1);
+
+	*packet_buffer_out = pcnet.tx_buffer_addr + (de_index * ETHERNET_MIN_FRAME_SIZE);
+
+	return de_index;
+}
+
+U0 PCNetFinishTransmitPacket(I64 de_index)
+{/* Release ownership of the packet to the PCNet card
+	by setting the OWN bit to 1. */ 
+	CPCNetDescriptorEntry *entry = &pcnet.tx_de_buffer[de_index];
+	Bts(&entry->status1, PCNET_DESCRIPTORf_OWN);
+}
+
+U0 EthernetFrameFinish(I64 de_index)
+{//Alias for driver Finish TX function.
+	PCNetFinishTransmitPacket(de_index);
+}
+
+I64 PCNetReceivePacket(U8 **packet_buffer_out, U16 *packet_length_out)
+{/* Receives the packet at the current RX DE index.
+	Parameters are both pointers, since we modify the value at the packet_buffer_out,
+	and at the packet_length, ending with returning the index of the DE we just processed.
+	The MCNT is stored at the first two bytes of the RMD2.
+	We AND with 0xFFFF to only take in those first two bytes: that is the packet_length.
+	The increment of the current RX DE index is done by assigning it the value of incrementing it AND the max DE index - 1.
+	This will increment it as well as wrap back to 0 if we hit the max DE index. */
+	ZenithLog("PCNet received packet. %X , %X",packet_buffer_out, packet_length_out);
+	I64 de_index = pcnet.current_rx_de_index;
+
+	CPCNetDescriptorEntry *entry = &pcnet.rx_de_buffer[de_index];
+	U16 packet_length = entry->status2 & 0xFFFF;
+
+	pcnet.current_rx_de_index = (pcnet.current_rx_de_index + 1) & (PCNET_RX_BUFF_COUNT - 1);
+
+	*packet_buffer_out = pcnet.rx_buffer_addr + (de_index * ETHERNET_MIN_FRAME_SIZE);
+	*packet_length_out = packet_length;
+	return de_index;
+}
+
+U0 PCNetReleaseReceivePacket(I64 de_index)
+{/* Release ownership of the packet to the PCNet card
+	by setting the OWN bit to 1. */ 
+	CPCNetDescriptorEntry *entry = &pcnet.rx_de_buffer[de_index];
+	Bts(&entry->status1, PCNET_DESCRIPTORf_OWN);
+}
+
+interrupt U0 PCNetIRQ()
+{// todo: comments explaining process...maybe reimplement interrupt handling altogether.
+	U8 *packet_buffer;
+	U16 packet_length;
+	I64 de_index;
+	U32 csr = PCNetReadCSR(PCNET_CSR_CTRLSTATUS);
+	//"Interrupt Reason: %X , %b\n",csr,csr;
+
+	CPCNetDescriptorEntry *entry = pcnet.rx_de_buffer;
+
+	while (PCNetDriverOwns(&entry[pcnet.current_rx_de_index]))
+	{
+		"%X", pcnet.current_rx_de_index;
+		de_index = PCNetReceivePacket(&packet_buffer, &packet_length);
+
+		if (de_index >= 0) // necessary? check increment logic in PCNetReceivePacket.
+		{
+			ZenithLog("Pushing copy into Net Queue, Releasing Receive Packet");
+			NetQueuePushCopy(packet_buffer, packet_length);
+			PCNetReleaseReceivePacket(de_index);
+		}
+
+		Bts(&csr, PCNET_CTRL_RINT);
+
+		PCNetWriteCSR(PCNET_CSR_CTRLSTATUS, csr);
+	}
+
+	*(dev.uncached_alias + LAPIC_EOI)(U32*) = 0;
+}
+
+U0 PCIRerouteInterrupts(I64 base)
+{// todo: comments explaining process, maybe better var names
+	I64 i;
+	U8 *da = dev.uncached_alias + IOAPIC_REG;
+	U32 *_d = dev.uncached_alias + IOAPIC_DATA;
+
+	for (i = 0; i < 4; i++)
+	{
+		*da = IOREDTAB + i * 2 + 1;
+		*_d = dev.mp_apic_ids[INT_DEST_CPU] << 24;
+		*da = IOREDTAB + i * 2;
+		*_d = 0x4000 + base + i;
+	}
+}
+
+U0 PCNetSetupInterrupts()
+{ // todo: comments explaining process
+	IntEntrySet(I_USER + 0, &PCNetIRQ, IDTET_IRQ);
+	IntEntrySet(I_USER + 1, &PCNetIRQ, IDTET_IRQ);
+	IntEntrySet(I_USER + 2, &PCNetIRQ, IDTET_IRQ);
+	IntEntrySet(I_USER + 3, &PCNetIRQ, IDTET_IRQ);
+	PCIRerouteInterrupts(I_USER);
+}
+
+U0 PCNetInit()
+{
+	MemSet(&pcnet, 0, sizeof(CPCNet)); // pcnet global var will hold member data the driver uses often.
+
+	pcnet.pci = PCNetPCIDevFind;
+	if (!pcnet.pci)
+		return; // if we don't find the card, quit.
+
+	//Clear command register of PCNet PCI device, set IO Enable and Bus Master Enable bits of the register.
+	PCIWriteU16(pcnet.pci->bus, pcnet.pci->dev, pcnet.pci->fun, PCI_REG_COMMAND, PCNET_CMDF_IOEN | PCNET_CMDF_BMEN);
+
+	PCNetReset;
+	PCNetEnter32BitMode;
+	PCNetSetSWStyle;
+	PCNetGetMAC;
+	// OSDev has code ensuring auto selected connection...
+	PCNetAllocateBuffers;
+	PCNetDirectInit;
+	PCNetSetInterruptCSR;
+	PCNetEnableTXAutoPad;
+	PCNetExitConfigMode;	
+	PCNetSetupInterrupts;
+
+	ClassRep(&pcnet);
+
+	"pcnet->rx_de_buffer: %X\n",pcnet.rx_de_buffer;
+	"pcnet->tx_de_buffer: %X\n",pcnet.tx_de_buffer;
+	"pcnet->rx_de_buffer_phys: %X\n",pcnet.rx_de_buffer_phys;
+	"pcnet->rx_de_buffer_phys: %X\n",pcnet.tx_de_buffer_phys;
+}
+
+I64 EthernetFrameAllocate(U8 **packet_buffer_out, U8 *source_address, U8 *destination_address, U16 ethertype, I64 packet_length)
+{/* Allocate an Ethernet Frame for transmit.
+	The source and destination addresses are copied to the Frame, as well as the ethertype.
+	The packet_buffer_out parameter has the value at its pointer set to the payload of the Ethernet Frame. */
+
+//todo: un magic number the rest of this
+	U8 *ethernet_frame;
+	I64 de_index;
+
+	//need to see if 3 years later VirtualBox supports APAD_XMT!
+	if (packet_length < ETHERNET_MIN_FRAME_SIZE)
+		packet_length = ETHERNET_MIN_FRAME_SIZE;
+
+	de_index = PCNetAllocateTransmitPacket(&ethernet_frame, 14 + packet_length);
+
+	if (de_index < 0)
+	{
+		ZenithErr("Ethernet Frame Allocate failure");
+		return -1; // Positive value expected. Functions calling this must factor this in.
+	}
+
+	MemCopy(ethernet_frame, destination_address, MAC_ADDRESS_LENGTH);
+	MemCopy(ethernet_frame + MAC_ADDRESS_LENGTH, source_address, MAC_ADDRESS_LENGTH);
+
+	*&ethernet_frame[ETHERNET_ETHERTYPE_OFFSET](U16 *) = ethertype;
+
+	*packet_buffer_out = ethernet_frame + ETHERNET_MAC_HEADER_LENGTH;
+
+	return de_index;
+}
+
+U64 EthernetGetMAC()
+{
+	return pcnet.mac_address;
+}
+
+PCNetInit;
diff --git a/src/Home/Net/ZenithStackNotes.DD b/src/Home/Net/ZenithStackNotes.DD
new file mode 100644
index 0000000000000000000000000000000000000000..20618498c7372fcdf8721bbadc90cc86bd04f639
GIT binary patch
literal 199
zcmY!h4$x7uF|<?Caq_e^RAFFbfPm#d3dCk)kl_PT-azb9lv$Qq#31bnWcvWIMu4+l
zYKbO9fjCeA$O|k@Elp*RG6qQlu^|vU0kMn_kT?s(t|b|%MR}<u3^MsZ-b5gF3<_Y7
x0;!7w;uIim2VyC6AaNLo3xIeD5X&3|5+LQC0bwQ#QqzE}DL}j%h^GQE0{|cb9OVE2

literal 0
HcmV?d00001

diff --git a/src/Home/SMBIOS.CC b/src/Home/SMBIOS.CC
new file mode 100644
index 00000000..1e1ce9bd
--- /dev/null
+++ b/src/Home/SMBIOS.CC
@@ -0,0 +1,261 @@
+//SMBIOS parsing.
+//Based on SMBIOS specification 3.3.0 (document "DSP0134")
+
+//Section 6.2 line 910 (required structures)
+#define SMBIOSt_BIOS		0
+#define SMBIOSt_SYSTEM		1
+#define SMBIOSt_ENCLOSURE	3
+#define SMBIOSt_PROCESSOR	4
+#define SMBIOSt_CACHE		7
+#define SMBIOSt_SLOTS		9
+#define SMBIOSt_PHYMEM		16
+#define SMBIOSt_MEM_DEVICE	17
+#define SMBIOSt_MAPPED_ADDR	19
+#define SMBIOSt_BOOT_INFO	32
+
+//Section 7.1.1 line 925
+#define SMBIOS_BIOSf_NO_SUPPORT		3
+#define SMBIOS_BIOSf_ISA			4
+#define SMBIOS_BIOSf_MCA			5
+#define SMBIOS_BIOSf_EISA			6
+#define SMBIOS_BIOSf_PCI			7
+#define SMBIOS_BIOSf_PCMCIA			8
+#define SMBIOS_BIOSf_PNP			9
+#define SMBIOS_BIOSf_APM			10
+#define SMBIOS_BIOSf_BIOS_FLASH		11
+#define SMBIOS_BIOSf_BIOS_SHADOW	12
+#define SMBIOS_BIOSf_VLVESA			13
+#define SMBIOS_BIOSf_ESCD			14
+#define SMBIOS_BIOSf_CD_BOOT		15
+#define SMBIOS_BIOSf_BOOT_SELECT	16
+#define SMBIOS_BIOSf_ROM_SOCKETED	17
+#define SMBIOS_BIOSf_PCMCIA_BOOT	18
+#define SMBIOS_BIOSf_EDD			19
+
+//Section 7.1.2.1 line 931
+#define SMBIOS_BIOSEXT1f_ACPI		0
+#define SMBIOS_BIOSEXT1f_USB_LEGACY	1
+#define SMBIOS_BIOSEXT1f_AGP		2
+
+//Section 7.1.2.2 line 935
+#define SMBIOS_BIOSEXT2f_BIOS_BOOT	0
+#define SMBIOS_BIOSEXT2f_NET_BOOT	1
+#define SMBIOS_BIOSEXT2f_UEFI		3
+#define SMBIOS_BIOSEXT2f_VM			4
+
+//Section 7.2.2 line 959
+#define SMBIOS_WAKEUPt_OTHER		1
+#define SMBIOS_WAKEUPt_UNKNOWN		2
+#define SMBIOS_WAKEUPt_APM			3
+#define SMBIOS_WAKEUPt_MODEM		4
+#define SMBIOS_WAKEUPt_LAN			5
+#define SMBIOS_WAKEUPt_POWER_SWITCH	6
+#define SMBIOS_WAKEUPt_PCI			7
+#define SMBIOS_WAKEUPt_AC_POWER		8
+
+//Section 7.3.2 line 977
+#define SMBIOS_BASEBOARDt_UNKNOWN				1
+#define SMBIOS_BASEBOARDt_OTHER					2
+#define SMBIOS_BASEBOARDt_SERVER_BLADE			3
+#define SMBIOS_BASEBOARDt_CONNECTIVITY_SWITCH	4
+#define SMBIOS_BASEBOARDt_SM_MODULE				5
+#define SMBIOS_BASEBOARDt_PROCESSOR_MODULE		6
+#define SMBIOS_BASEBOARDt_IO_MODULE				7
+#define SMBIOS_BASEBOARDt_MEMORY_MODULE			8
+#define SMBIOS_BASEBOARDt_DAUGHTERBOARD			9
+#define SMBIOS_BASEBOARDt_MOTHERBOARD			10
+#define SMBIOS_BASEBOARDt_PROCESSOR_MEMORY_MODULE	11
+#define SMBIOS_BASEBOARDt_PROCESSOR_IO_MODULE	12
+#define SMBIOS_BASEBOARDt_INTERCONNECT_BOARD	13
+
+//Section 7.3.1 line 972 (baseboard feature flags)
+#define SMBIOS_BASEBOARDf_HOST			0
+#define SMBIOS_BASEBOARDf_AUX_REQUIRED	1
+#define SMBIOS_BASEBOARDf_REMOVABLE		2
+#define SMBIOS_BASEBOARDf_REPLACEABLE	3
+#define SMBIOS_BASEBOARDf_HOTSWAPPABLE	4
+
+
+class CSMBIOSHeader
+{//Section 6.1.2 line 885
+	U8	type,	//SMBIOSt_*
+		length;
+	U16	handle;	//identifier for this structure.
+};
+
+class CSMBIOSEntryPoint
+{//Section 5.2.1 line 812
+	U8	anchor_str[4], // '_SM_'
+		checksum,
+		length,
+		major_version,
+		minor_version;
+	U16	max_structure_size;
+	U8	entry_point_revision,
+		formatted_area[5],
+		anchor_str2[5], // '_DMI_'
+		checksum2;
+	U16	table_length;
+	U32	table_address;
+	U16	structure_count;
+	U8	bcd_revision;
+};
+
+class CSMBIOSBIOSInfo
+{//Section 7.1 line 922
+	CSMBIOSHeader header;
+	U8	vendor,
+		bios_version;
+	U16	bios_start_address_segment;
+	U8	bios_release_date,
+		bios_rom_size;
+	U64	bios_flags;
+	U8	extended_bios_flags[2];
+	U8	bios_major_release,
+		bios_minor_release,
+		embedded_controller_firmware_major_release,
+		embedded_controller_firmware_minor_release;
+	U16	extended_bios_rom_size;
+};
+
+class CSMBIOSSystemInfo
+{//Section 7.2 line 936
+	CSMBIOSHeader header;
+	U8	manufacturer,
+		product_name,
+		version,
+		serial_number,
+		uuid[16],
+		wake_up_type,
+		sku_number,
+		family;
+};
+
+class CSMBIOSBaseboardInfo
+{//Section 7.3 line 968
+	CSMBIOSHeader header;
+	U8	manufacturer,
+		product,
+		version,
+		serial_number,
+		asset_tag,
+		feature_flags,
+		chassis_location;
+	U16	chassis_handle;
+	U8	board_type,
+		contained_object_handles_num;
+	U16	contained_object_handles[1]; //Variable length, member above gives length
+};
+
+class CSMBIOSEnclosureInfo
+{
+	CSMBIOSHeader header;
+	
+};
+
+Bool SMBIOSEntryScan(CSMBIOSEntryPoint **entry)
+{//Search 0xF0000 - 0x100000 for SMBIOS Entry Point structure.
+	I64 i;
+	U8 noreg checksum = 0, *mem = 0xF0000;
+
+	while (mem < 0x100000)
+	{
+		if (!MemCompare(mem, "_SM_", 4))
+		{
+			*entry = mem;
+			for (i = 0; i < (*entry)->length; i++)
+				checksum += mem[i];
+
+			if (checksum == 0) //valid checksums sum to zero
+				break;
+		}
+		mem += 16; //anchor sits on 16-byte boundary
+	}
+	ClassRep(*entry,,,,TRUE);	
+	return mem != 0x100000;
+}
+
+
+U8 *SMBIOSStringGet(CSMBIOSHeader *header, I64 str_num)
+{
+	if (!str_num) return NULL;
+
+	I64 i;
+	U8* ptr = header(U8 *) + header->length;
+
+	for (i = 1; i < str_num; i++)
+	{
+		while (*ptr++);
+		if (!ptr[0] && !ptr[1])  //structure ends in double NULL
+		{
+			return NULL;
+		}
+	}
+	return ptr;
+}
+
+U0 SMBIOSInit()
+{
+	I64 i = 1;
+	CSMBIOSEntryPoint *entry;
+	U8 *header;
+
+	if (!SMBIOSEntryScan(&entry))
+		return;
+
+	header = entry->table_address;
+
+	while (header(CSMBIOSHeader *)->type != 127)
+	{
+
+		switch (header(CSMBIOSHeader *)->type)
+		{
+			case SMBIOSt_BIOS:
+				ClassRep(header(CSMBIOSBIOSInfo *),,,,TRUE);
+				break;
+			case SMBIOSt_SYSTEM:
+				CSMBIOSSystemInfo *info = header;
+				ClassRep(info,,,,TRUE);
+				"%s\n", SMBIOSStringGet(info, info->manufacturer);
+				"%z\n", info->wake_up_type, " \0Other\0Unknown\0APM\0Modem\0LAN\0Power Switch\0PCI\0AC Power";
+				break;
+		}
+
+		header += header(CSMBIOSHeader *)->length;
+		for (i = 1; header[i - 1] || header[i]; i++);
+		header += i + 1;
+	}
+}
+
+SMBIOSInit;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/Kernel/KConfig.CC b/src/Kernel/KConfig.CC
index 18d85b71..0db748c8 100755
--- a/src/Kernel/KConfig.CC
+++ b/src/Kernel/KConfig.CC
@@ -54,7 +54,7 @@ U0 KConfigOptions(CKConfig *c)
 			else
 				"$$PURPLE$$%13tz$$FG$$:%Z\n",i,kernel_config_options,c->opts[i],"ST_OFF_ON";
 		"\nType '$$PURPLE$$Help$$FG$$' for help.\n";
-		st=GetStr("Option ($$PURPLE$$<ENTER>$$FG$$ when done):","");
+		st=StrGet("Option ($$PURPLE$$<ENTER>$$FG$$ when done):","");
 		i=ListMatch(st,kernel_config_options,LMF_IGNORE_CASE);
 		if (i==CONFIG_HELP)
 			"\n"
@@ -85,7 +85,7 @@ U0 KConfigOptions(CKConfig *c)
 							c->var_init_val=GetI64("Val (0-255):",255,0,255);
 						break;
 					case CONFIG_HOME_DIR:
-						st2=GetStr("Home Dir(\"%s\"):",c->home_dir);
+						st2=StrGet("Home Dir(\"%s\"):",c->home_dir);
 						if (!*st2)
 							st2=StrNew("::/Home");
 						else if (st2[1]!=':') {
@@ -131,7 +131,7 @@ U0 KConfigOptions(CKConfig *c)
 						c->debug_distro_file=0;
 						c->debug_distro_start=0;
 						if (state) {
-							c->debug_distro_file=GetStr("Debug Distro File:");
+							c->debug_distro_file=StrGet("Debug Distro File:");
 							c->debug_distro_start=GetI64("Debug Distro Start:");
 						}
 						break;
@@ -164,7 +164,7 @@ CKConfig *KConfigNew()
 	}
  
 
-	c->disk_cache_size_exp = GetStr("\nDisk Cache Size in Bytes, gets rounded-up funny, "
+	c->disk_cache_size_exp = StrGet("\nDisk Cache Size in Bytes, gets rounded-up funny, "
 																"($$PURPLE$$<ENTER>$$FG$$ will use default.):",
 																"Scale2Mem(0x80000,0x8000000)");
 	KConfigOptions(c);
diff --git a/src/Kernel/KernelA.HH b/src/Kernel/KernelA.HH
index 3d02e1fc..7bb7860f 100755
--- a/src/Kernel/KernelA.HH
+++ b/src/Kernel/KernelA.HH
@@ -16,29 +16,29 @@ extern class CIntermediateCode;
 extern class CJobCtrl;
 extern class CTask;
 
-#define NULL		0
-#define TRUE		1
+#define NULL	0
+#define TRUE	1
 #define FALSE 	0
-#define ON			1
-#define OFF 		0
-#define NONE		0 //for use in default arguments
-#define I8_MIN (-0x80)
-#define I8_MAX 0x7F
-#define U8_MIN 0
-#define U8_MAX 0xFF
-#define I16_MIN (-0x8000)
-#define I16_MAX 0x7FFF
-#define U16_MIN 0
-#define U16_MAX 0xFFFF
-#define I32_MIN (-0x80000000)
-#define I32_MAX 0x7FFFFFFF
-#define U32_MIN 0
-#define U32_MAX 0xFFFFFFFF
-#define I64_MIN (-0x8000000000000000)
-#define I64_MAX 0x7FFFFFFFFFFFFFFF
+#define ON		1
+#define OFF 	0
+#define NONE	0 //for use in default arguments
+#define I8_MIN	(-0x80)
+#define I8_MAX	0x7F
+#define U8_MIN	0
+#define U8_MAX	0xFF
+#define I16_MIN	(-0x8000)
+#define I16_MAX	0x7FFF
+#define U16_MIN	0
+#define U16_MAX	0xFFFF
+#define I32_MIN	(-0x80000000)
+#define I32_MAX	0x7FFFFFFF
+#define U32_MIN	0
+#define U32_MAX	0xFFFFFFFF
+#define I64_MIN	(-0x8000000000000000)
+#define I64_MAX	0x7FFFFFFFFFFFFFFF
 #define U64_MIN 0
-#define U64_MAX 0xFFFFFFFFFFFFFFFF
-#define INVALID_PTR 		I64_MAX
+#define U64_MAX	0xFFFFFFFFFFFFFFFF
+#define INVALID_PTR	I64_MAX
 #define STR_LEN 144
 
 //(Int to F64 conversion is signed)
@@ -46,17 +46,17 @@ extern class CTask;
 #define U64_F64_MAX (0x43F0000000000000(F64))
 #define F64_MAX (0x7FEFFFFFFFFFFFFF(F64))
 #define F64_MIN (0xFFEFFFFFFFFFFFFF(F64))
-#define inf 		(0x7FF0000000000000(F64))
-#define ì 			(0x7FF0000000000000(F64))
-#define pi			(0x400921FB54442D18(F64))
-#define ã 			(0x400921FB54442D18(F64))
+#define inf 	(0x7FF0000000000000(F64))
+#define ì 		(0x7FF0000000000000(F64))
+#define pi		(0x400921FB54442D18(F64))
+#define ã 		(0x400921FB54442D18(F64))
 #define exp_1 	(0x4005BF0A8B145769(F64)) //The number "e"
 #define log2_10 (0x400A934F0979A371(F64))
 #define log2_e	(0x3FF71547652B82FE(F64))
 #define log10_2 (0x3FD34413509F79FF(F64))
 #define loge_2	(0x3FE62E42FEFA39EF(F64))
 #define sqrt2 	(0x3FF6A09E667F3BCD(F64))
-#define eps 		(0x3CB0000000000000(F64))
+#define eps 	(0x3CB0000000000000(F64))
 
 #help_index "Data Types/Simple"
 /*CosmiC union structure is treated as a
@@ -2375,69 +2375,69 @@ class CUAsmGlobals
 #help_index "Devices;PCI"
 
 //PCI Registers, used with $LK,"PCIRead",A="MN:PCIReadU16"$ functions.
-#define PCIR_VENDOR_ID					0x00
-#define PCIR_DEVICE_ID					0x02
-#define PCIR_COMMAND						0x04
-#define PCIR_STATUS 						0x06
-#define PCIR_REVISION_ID				0x08
-#define PCIR_PROG_IF						0x09
-#define PCIR_SUB_CODE 					0x0A
-#define PCIR_CLASS_CODE 				0x0B
-#define PCIR_CACHE_LINE_SIZE		0x0C
-#define PCIR_LATENCY_TIMER			0x0D
-#define PCIR_HEADER_TYPE				0x0E
-#define PCIR_BIST 							0x0F
-#define PCIR_BASE0							0x10
-#define PCIR_BASE1							0x14
-#define PCIR_BASE2							0x18
-#define PCIR_BASE3							0x1C
-#define PCIR_BASE4							0x20
-#define PCIR_BASE5							0x24
+#define PCIR_VENDOR_ID			0x00
+#define PCIR_DEVICE_ID			0x02
+#define PCIR_COMMAND			0x04
+#define PCIR_STATUS 			0x06
+#define PCIR_REVISION_ID		0x08
+#define PCIR_PROG_IF			0x09
+#define PCIR_SUB_CODE 			0x0A
+#define PCIR_CLASS_CODE 		0x0B
+#define PCIR_CACHE_LINE_SIZE	0x0C
+#define PCIR_LATENCY_TIMER		0x0D
+#define PCIR_HEADER_TYPE		0x0E
+#define PCIR_BIST 				0x0F
+#define PCIR_BASE0				0x10
+#define PCIR_BASE1				0x14
+#define PCIR_BASE2				0x18
+#define PCIR_BASE3				0x1C
+#define PCIR_BASE4				0x20
+#define PCIR_BASE5				0x24
 #define PCIR_SUBSYS_VENDOR_ID 	0x2C
-#define PCIR_SUBSYS_ID					0x2E
-#define PCIR_EXPANSION_ROM			0x30
-#define PCIR_CAPABILITIES 			0x34
-#define PCIR_INTERRUPT_LINE 		0x3C
-#define PCIR_INTERRUPT_PIN			0x3D
-#define PCIR_MIN_GRANT					0x3E
-#define PCIR_MAX_LATENCY				0x3F
+#define PCIR_SUBSYS_ID			0x2E
+#define PCIR_EXPANSION_ROM		0x30
+#define PCIR_CAPABILITIES 		0x34
+#define PCIR_INTERRUPT_LINE 	0x3C
+#define PCIR_INTERRUPT_PIN		0x3D
+#define PCIR_MIN_GRANT			0x3E
+#define PCIR_MAX_LATENCY		0x3F
 
 //PCI class codes
-#define PCIC_STORAGE		0x1
-#define PCIC_NETWORK		0x2
+#define PCIC_STORAGE	0x1
+#define PCIC_NETWORK	0x2
 
 //PCI subclass codes
 #define PCISC_ETHERNET	0x0
-#define PCISC_AHCI			0x6
+#define PCISC_AHCI		0x6
 
 class CPCIDev
 {
 	CPCIDev *next, *last;
 
-	U8		bus,dev,fun,
-				*vendor_str,
-				*dev_id_str,
-				class_code,
-				sub_code,
-				prog_if,
-				revision_id,
-				bist,
-				header_type,
-				latency_timer,
-				cache_line_size,
-				capabilities,
-				interrupt_line,
-				interrupt_pin,
-				min_grant,
-				max_latency;
+	U8	bus,dev,fun,
+		*vendor_str,
+		*dev_id_str,
+		class_code,
+		sub_code,
+		prog_if,
+		revision_id,
+		bist,
+		header_type,
+		latency_timer,
+		cache_line_size,
+		capabilities,
+		interrupt_line,
+		interrupt_pin,
+		min_grant,
+		max_latency;
 
-	U16 	vendor_id,
-				device_id,
-				subsys_id,
-				subsys_vendor_id;
+	U16	vendor_id,
+		device_id,
+		subsys_id,
+		subsys_vendor_id;
 
-	U32 	base[6],
-				erom;
+	U32 base[6],
+		erom;
 };
 
 #help_index "Devices;File/System;PCI"
@@ -2447,51 +2447,102 @@ public class CATARep
 	I64 	num,type,base0,base1,unit,irq;
 };
 
+//AHCI definitions
+#define AHCI_SIG_ATA	0x00000101
+#define AHCI_SIG_ATAPI	0xEB140101
+#define AHCI_SIG_SEMB	0xC33C0101 //Enclosure Management Bridge... rare to encounter in the wild
+#define AHCI_SIG_PM		0x96690101 //Port multiplier... not relevant to PC-type systems.
+
+#define AHCI_MAX_PORTS			32
+#define AHCI_PRDT_MAX_LEN		32
+#define AHCI_PRDT_BYTES_BITS	22
+#define AHCI_PRDT_BYTES			(1 << 22)
+
+#define AHCI_GHCf_HBA_RESET			0
+#define AHCI_GHCf_INTERRUPT_ENABLE	1
+#define AHCI_GHCf_AHCI_ENABLE		31
+
+#define AHCI_CAPSEXTf_BOH	0
+
+#define AHCI_BOHCf_BOS	0
+#define AHCI_BOHCf_OOS	1
+#define AHCI_BOHCf_BB	4
+
+#define AHCI_CHDESCf_W	6
+#define AHCI_CHDESCf_W	(1 << 6)
+
+#define AHCI_CFDESCf_C	7
+#define AHCI_CFDESCf_C	(1 << 7)
+
+#define AHCI_PxCMDf_ST		0
+#define AHCI_PxCMDf_SUD		1
+#define AHCI_PxCMDf_POD		2
+#define AHCI_PxCMDf_FRE		4
+#define AHCI_PxCMDf_FR		14
+#define AHCI_PxCMDf_CR		15
+#define AHCI_PxCMDf_ATAPI	24
+
+#define AHCI_PxCMDF_ST		(1 << 0)
+#define AHCI_PxCMDF_SUD		(1 << 1)
+#define AHCI_PxCMDF_POD		(1 << 2)
+#define AHCI_PxCMDF_FRE		(1 << 4)
+#define AHCI_PxCMDF_FR		(1 << 14)
+#define AHCI_PxCMDF_CR		(1 << 15)
+#define AHCI_PxCMDF_ATAPI	(1 << 24)
+
+#define AHCI_PxIEf_DP	5
+#define AHCI_PxIEf_TFE	30
+
+#define AHCI_PxIEF_DP	(1 << 5)
+#define AHCI_PxIEF_TFE	(1 << 30)
+
+#define AHCI_PxSCTLf_DET_INIT
+
 //See $LK,"::/Doc/Credits.DD"$.
-#define ATA_NOP 								0x00
-#define ATA_DEV_RST 						0x08
-#define ATA_PACKET							0xA0
-#define ATA_READ_NATIVE_MAX 		0xF8
+#define ATA_NOP 				0x00
+#define ATA_DEV_RST 			0x08
+#define ATA_PACKET				0xA0
+#define ATA_READ_NATIVE_MAX 	0xF8
 #define ATA_READ_NATIVE_MAX_EXT 0x27
-#define ATA_SET_MAX 						0xF9
-#define ATA_SET_MAX_EXT 				0x37
-#define ATA_READ_MULTI					0xC4
-#define ATA_READ_MULTI_EXT			0x29
-#define ATA_WRITE_MULTI 				0xC5
-#define ATA_WRITE_MULTI_EXT 		0x39
-#define ATA_ID_DEV							0xEC
+#define ATA_SET_MAX 			0xF9
+#define ATA_SET_MAX_EXT 		0x37
+#define ATA_READ_MULTI			0xC4
+#define ATA_READ_MULTI_EXT		0x29
+#define ATA_WRITE_MULTI 		0xC5
+#define ATA_WRITE_MULTI_EXT 	0x39
+#define ATA_ID_DEV				0xEC
 
-#define ATAS_ERR				0x01
-#define ATAS_DRQ				0x08
-#define ATAS_DF 				0x20
-#define ATAS_DRDY 			0x40
-#define ATAS_BSY				0x80
+#define ATAS_ERR	0x01
+#define ATAS_DRQ	0x08
+#define ATAS_DF 	0x20
+#define ATAS_DRDY	0x40
+#define ATAS_BSY	0x80
 
-#define ATAR0_DATA			0
-#define ATAR0_FEAT			1
-#define ATAR0_NSECT 		2
-#define ATAR0_SECT			3
-#define ATAR0_LCYL			4
-#define ATAR0_HCYL			5
-#define ATAR0_SEL 			6
-#define ATAR0_STAT			7
-#define ATAR0_CMD 			7
-#define ATAR1_CTRL			2
+#define ATAR0_DATA	0
+#define ATAR0_FEAT	1
+#define ATAR0_NSECT 2
+#define ATAR0_SECT	3
+#define ATAR0_LCYL	4
+#define ATAR0_HCYL	5
+#define ATAR0_SEL 	6
+#define ATAR0_STAT	7
+#define ATAR0_CMD 	7
+#define ATAR1_CTRL	2
 
 #help_index "File/FileNames"
-#define FILEMASK_JIT		"*.CC*;*.HH*"
-#define FILEMASK_AOT		"*.CC*;*.HH*;*.PRJ*"
-#define FILEMASK_SRC		"*.CC*;*.HH*;*.IN*;*.PRJ*"
-#define FILEMASK_DD 		FILEMASK_SRC ";*.DD*"
-#define FILEMASK_TXT		FILEMASK_DD ";*.TXT*"
-#define FILEMASK_GR 		"*.GR*"
+#define FILEMASK_JIT	"*.CC*;*.HH*"
+#define FILEMASK_AOT	"*.CC*;*.HH*;*.PRJ*"
+#define FILEMASK_SRC	"*.CC*;*.HH*;*.IN*;*.PRJ*"
+#define FILEMASK_DD 	FILEMASK_SRC ";*.DD*"
+#define FILEMASK_TXT	FILEMASK_DD ";*.TXT*"
+#define FILEMASK_GR 	"*.GR*"
 
 #help_index "File/Low Level"
 #define BLK_SIZE_BITS 	9
-#define BLK_SIZE				(1<<BLK_SIZE_BITS)
-#define DVD_BLK_SIZE		(4*BLK_SIZE)
-#define DVD_BOOT_LOADER_SIZE		DVD_BLK_SIZE*1
-#define INVALID_CLUS (-1)
+#define BLK_SIZE		(1<<BLK_SIZE_BITS)
+#define DVD_BLK_SIZE	(4*BLK_SIZE)
+#define DVD_BOOT_LOADER_SIZE	DVD_BLK_SIZE*1
+#define INVALID_CLUS	(-1)
 
 class CMBRPart
 {
@@ -3838,7 +3889,7 @@ public class CDC
 #define VGAM_GRAPHICS 	0xA0000
 
 #define "Char/Input;StdIn"
-//GetStr flags
+//StrGet flags
 #define GSF_SHIFT_ESC_EXIT			1 //This kills task on <SHIFT-ESC>
 #define GSF_WITH_NEW_LINE 			2
 
diff --git a/src/Kernel/KernelC.HH b/src/Kernel/KernelC.HH
index 4d0620e3..203487eb 100755
--- a/src/Kernel/KernelC.HH
+++ b/src/Kernel/KernelC.HH
@@ -500,14 +500,14 @@ extern CJob sys_macro_head;
 extern CTask *sys_macro_task;
 
 #help_index "Keyboard Devices;Char/Input;StdIn"
-extern U8  *(*fp_getstr2)(I64 flags=0); //GetStr $LK,"Flags",A="MN:GSF_SHIFT_ESC_EXIT"$
+extern U8  *(*fp_getstr2)(I64 flags=0); //StrGet $LK,"Flags",A="MN:GSF_SHIFT_ESC_EXIT"$
 public extern Bool AreYouSure();
 public extern I64 GetChar(I64 *_scan_code=NULL,Bool echo=TRUE,
 				Bool raw_cursor=FALSE);
 public extern I64 GetKey(I64 *_scan_code=NULL,Bool echo=FALSE,
 				Bool raw_cursor=FALSE);
 public extern I64 GetS(U8 *buf,I64 size,Bool allow_ext=TRUE);
-public extern U8 *GetStr(U8 *message=NULL,U8 *default=NULL,I64 flags=0);
+public extern U8 *StrGet(U8 *message=NULL,U8 *default=NULL,I64 flags=0);
 extern U0 			KbdInit();
 public extern I64 KbdMouseEventTime();
 extern U0 			KbdMouseHandler(Bool poll_kbd,Bool poll_mouse);
diff --git a/src/Kernel/SerialDev/Message.CC b/src/Kernel/SerialDev/Message.CC
index ef9e945f..d1d4a15f 100755
--- a/src/Kernel/SerialDev/Message.CC
+++ b/src/Kernel/SerialDev/Message.CC
@@ -190,7 +190,7 @@ I64 GetChar(I64 *_scan_code=NULL,Bool echo=TRUE,Bool raw_cursor=FALSE)
 	return ch1;
 }
 
-U8 *GetStr(U8 *message=NULL,U8 *default=NULL,I64 flags=0)
+U8 *StrGet(U8 *message=NULL,U8 *default=NULL,I64 flags=0)
 {//Returns a $LK,"MAlloc",A="MN:MAlloc"$()ed prompted string.  See $LK,"Flags",A="MN:GSF_SHIFT_ESC_EXIT"$.
 	U8 *st;
 	if (message)
@@ -212,7 +212,7 @@ I64 GetS(U8 *buf,I64 size,Bool allow_ext=TRUE)
 	I64 ch,i=0;
 	if (!size || !buf) return 0;
 	if (allow_ext) {
-		st=GetStr;
+		st=StrGet;
 		if (StrLen(st)>size-1) {
 			MemCopy(buf,st,size-1);
 			buf[size-1]=0;
diff --git a/src/Misc/OSInstall.CC b/src/Misc/OSInstall.CC
index 4ca7640b..6afc7223 100755
--- a/src/Misc/OSInstall.CC
+++ b/src/Misc/OSInstall.CC
@@ -94,7 +94,7 @@ U0 RegularInstallWiz()
 	num_hints=ATARep(FALSE,,&head);
 	"\nInclude '$$PURPLE$$0x$$FG$$' for hexidecimal numbers.\n\n";
 	while (TRUE) {
-		base0=GetStr("Hard Drive I/O Port Base0  : ");
+		base0=StrGet("Hard Drive I/O Port Base0  : ");
 		if (0<Str2I64(base0)<=0xFFFF)
 			break;
 		Free(base0);
@@ -109,13 +109,13 @@ U0 RegularInstallWiz()
 		Free(st);
 	} else {
 		while (TRUE) {
-			base1=GetStr("Hard Drive I/O Port Base1  : ");
+			base1=StrGet("Hard Drive I/O Port Base1  : ");
 			if (0<Str2I64(base1)<=0xFFFF)
 				break;
 			Free(base1);
 		}
 		do {
-			st =GetStr("Unit--$$PURPLE$$0$$FG$$=Master or $$PURPLE$$1$$FG$$=Slave: ","0");
+			st =StrGet("Unit--$$PURPLE$$0$$FG$$=Master or $$PURPLE$$1$$FG$$=Slave: ","0");
 			unit=Str2I64(st);
 			Free(st);
 		} while (!(0<=unit<=1));
@@ -124,7 +124,7 @@ U0 RegularInstallWiz()
 	XTalkWait(task,"%s\n%s\n%C\n",base0,base1,'0'+unit);
 	DriveRep;
 	do {
-		st=GetStr("\nDestination Partition Letter: ");
+		st=StrGet("\nDestination Partition Letter: ");
 		if (*st)
 			drv_let=Letter2Letter(*st);
 		else
diff --git a/src/Zenith/Ctrls/CtrlsSlider.CC b/src/Zenith/Ctrls/CtrlsSlider.CC
index 5e44e295..ec173c15 100755
--- a/src/Zenith/Ctrls/CtrlsSlider.CC
+++ b/src/Zenith/Ctrls/CtrlsSlider.CC
@@ -20,7 +20,7 @@ CTemplateCS *CtrlSliderGet()
 
 	"$$PURPLE$$Ctrl Slider$$FG$$\n\n";
 
-	res->global_name=GetStr("Global Struct Name (ENTER for No Global):");
+	res->global_name=StrGet("Global Struct Name (ENTER for No Global):");
 	res->range=GetI64 		("Range 	(%4d):",30);
 	res->spacing=GetI64("Spacing (%4d):",20);
 	res->border=GetI64 ("Border  (%4d):",2);
@@ -28,7 +28,7 @@ CTemplateCS *CtrlSliderGet()
 	res->next_slider=res->last_slider=&res->next_slider;
 	while (TRUE) {
 		StrPrint(prompt,"Slider #%d Name:",res->num_sliders+1);
-		st=GetStr(prompt);
+		st=StrGet(prompt);
 		if (!*st) {
 			Free(st);
 			break;
diff --git a/src/Zenith/DolDoc/DocGet.CC b/src/Zenith/DolDoc/DocGet.CC
index 961e368a..9f1103ee 100755
--- a/src/Zenith/DolDoc/DocGet.CC
+++ b/src/Zenith/DolDoc/DocGet.CC
@@ -177,7 +177,7 @@ public I64 GetI64(U8 *message=NULL,I64 default=0,I64 lo=I64_MIN,I64 hi=I64_MAX)
 	while (TRUE) {
 		if (message)
 			"" message,default;
-		st=GetStr;
+		st=StrGet;
 		if (!*st) {
 			Free(st);
 			return default;
@@ -203,7 +203,7 @@ public F64 GetF64(U8 *message=NULL,F64 default=0,F64 lo=F64_MIN,F64 hi=F64_MAX)
 	while (TRUE) {
 		if (message)
 			"" message,default;
-		st=GetStr;
+		st=StrGet;
 		if (!*st) {
 			Free(st);
 			return default;
@@ -230,7 +230,7 @@ public CDate GetDate(U8 *message=NULL,CDate default=I64_MIN,
 	while (TRUE) {
 		if (message)
 			"" message,default,default;
-		st=GetStr;
+		st=StrGet;
 		if (!*st) {
 			Free(st);
 			return default;
diff --git a/src/Zenith/DolDoc/DocPopUp.CC b/src/Zenith/DolDoc/DocPopUp.CC
index f5dceac7..8799a390 100755
--- a/src/Zenith/DolDoc/DocPopUp.CC
+++ b/src/Zenith/DolDoc/DocPopUp.CC
@@ -164,7 +164,7 @@ U8 *PopUpGetStr2(U8 *header,CTask *mem_task)
 	U8 *res,*st;
 	if (header)
 		"%s",header;
-	st=GetStr(,,GSF_WITH_NEW_LINE);
+	st=StrGet(,,GSF_WITH_NEW_LINE);
 	res=StrNew(st,mem_task);
 	Free(st);
 	return res;
diff --git a/src/Zenith/ZBlkDev/Mount.CC b/src/Zenith/ZBlkDev/Mount.CC
index d417ebc6..af204aa8 100755
--- a/src/Zenith/ZBlkDev/Mount.CC
+++ b/src/Zenith/ZBlkDev/Mount.CC
@@ -43,7 +43,7 @@ U8 Mount2(U8 boot_drive_let,CDoc *_doc,Bool _caller_is_prtdisk)
 					GetS(blks_buf,STR_LEN);
 					break;
 				case BDT_ISO_FILE_READ:
-					filename=GetStr("File Name:");
+					filename=StrGet("File Name:");
 					break;
 				case BDT_ATA:
 					prt_num=GetI64("Partition Num (Default=All):",prt_num);
diff --git a/src/Zenith/ZDebug.CC b/src/Zenith/ZDebug.CC
index 4ef99fa1..6f614d2c 100755
--- a/src/Zenith/ZDebug.CC
+++ b/src/Zenith/ZDebug.CC
@@ -1,6 +1,5 @@
 #help_index "Debugging/Dump"
-Bool ClassRep2(CDoc *doc,U8 *_d,U8 *class_name=lastclass,Bool u8_chars,
-				I64 depth,I64 max_depth,Bool dynamic,I64 types=HTT_CLASS,I64 offset=0)
+Bool ClassRep2(CDoc *doc,U8 *_d,U8 *class_name=lastclass,Bool u8_chars,Bool force,I64 depth,I64 max_depth,Bool dynamic,I64 types=HTT_CLASS,I64 offset=0)
 {//See $LK,"::/Demo/LastClass.CC"$.
 	I64 i,j,stars,*ptr;
 	CMemberList *ml;
@@ -12,7 +11,7 @@ Bool ClassRep2(CDoc *doc,U8 *_d,U8 *class_name=lastclass,Bool u8_chars,
 		DocPrint(doc,"Class Not Found.\n");
 		return FALSE;
 	}
-	if (!CheckPtr(_d) || !CheckPtr(_d(U8 *)+tmpc->size)) {
+	if (!force && (!CheckPtr(_d) || !CheckPtr(_d(U8 *)+tmpc->size))) {
 		DocPrint(doc,"Bad Ptr:%016X\n",_d);
 		return FALSE;
 	}
@@ -143,9 +142,9 @@ Bool ClassRep2(CDoc *doc,U8 *_d,U8 *class_name=lastclass,Bool u8_chars,
 					DocPrint(doc,"$$TR,\"%s\"$$\n",ml->str);
 					DocPrint(doc,"$$ID,2$$");
 					if (!stars)
-						ClassRep2(doc,ptr,tmpc2->str,u8_chars,depth+1,max_depth,dynamic);
+						ClassRep2(doc,ptr,tmpc2->str,u8_chars,force,depth+1,max_depth,dynamic);
 					else if (stars==1)
-						ClassRep2(doc,*ptr,tmpc2->str,u8_chars,depth+1,max_depth,dynamic);
+						ClassRep2(doc,*ptr,tmpc2->str,u8_chars,force,depth+1,max_depth,dynamic);
 					DocPrint(doc,"$$ID,-2$$");
 				}
 			} else
@@ -158,8 +157,7 @@ Bool ClassRep2(CDoc *doc,U8 *_d,U8 *class_name=lastclass,Bool u8_chars,
 	return TRUE;
 }
 
-public U0 ClassRep(U8 *_d,U8 *class_name=lastclass,
-				I64 max_depth=2,Bool u8_chars=FALSE,Bool fun=FALSE,I64 offset=0)
+public U0 ClassRep(U8 *_d, U8 *class_name=lastclass, I64 max_depth=2, Bool u8_chars=FALSE, Bool force=FALSE, Bool fun=FALSE, I64 offset=0)
 {//Displays members of a record by using the compiler's info.
 	CDoc *doc;
 	I64 type;
@@ -176,7 +174,7 @@ public U0 ClassRep(U8 *_d,U8 *class_name=lastclass,
 	else
 		type=HTT_CLASS;
 
-	ClassRep2(doc,_d,class_name,u8_chars,0,max_depth,FALSE,type,offset);
+	ClassRep2(doc,_d,class_name,u8_chars,force,0,max_depth,FALSE,type,offset);
 
 	DocPrint(doc,"\n");
 	DocRecalc(doc);
@@ -189,7 +187,7 @@ public U0 ClassRep(U8 *_d,U8 *class_name=lastclass,
 }
 
 public U0 ClassRepD(U8 *_d,U8 *class_name=lastclass,
-				I64 max_depth=2,Bool u8_chars=FALSE,Bool fun=FALSE,I64 offset=0)
+				I64 max_depth=2,Bool u8_chars=FALSE,Bool force=FALSE,Bool fun=FALSE,I64 offset=0)
 {//Dynamic ClassRep. Uses hex_ed widget for live changes.
 	CDoc *doc;
 	if (IsRaw)
@@ -199,9 +197,9 @@ public U0 ClassRepD(U8 *_d,U8 *class_name=lastclass,
 		doc=DocPut;
 	}
 	if (fun)
-		ClassRep2(doc,_d,class_name,u8_chars,0,max_depth,TRUE,HTT_FUN,offset);
+		ClassRep2(doc,_d,class_name,u8_chars,force,0,max_depth,TRUE,HTT_FUN,offset);
 	else
-		ClassRep2(doc,_d,class_name,u8_chars,0,max_depth,TRUE,HTT_CLASS,offset);
+		ClassRep2(doc,_d,class_name,u8_chars,force,0,max_depth,TRUE,HTT_CLASS,offset);
 	DocPrint(doc,"\n");
 	DocRecalc(doc);
 	if (IsRaw) {
@@ -240,10 +238,10 @@ public U0 FunRep(U8 *st,U8 *rbp=NULL,I64 max_depth=2,CTask *task=NULL)
 				img=MAlloc(size);
 				MemCopy(img,rbp+tmpf->size,size);
 				UpdateRegVarImg(tmpf,img-tmpf->size,task);
-				ClassRep(img-tmpf->size,st,max_depth,FALSE,TRUE,rbp-img+tmpf->size);
+				ClassRep(img-tmpf->size,st,max_depth,FALSE,FALSE,TRUE,rbp-img+tmpf->size);
 				Free(img);
 			} else
-				ClassRep(rbp,st,max_depth,FALSE,TRUE);
+				ClassRep(rbp,st,max_depth,FALSE,FALSE,TRUE);
 		} else {
 			tmpm=tmpf->member_list_and_root;
 			while (tmpm) {