Control register bit flags added

This commit is contained in:
xmm15 2020-02-16 15:25:13 -06:00
parent a2187525f3
commit 22a7cbc551
9 changed files with 1701 additions and 1678 deletions

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@ -69,7 +69,7 @@ $FG,2$Merge(\"C:/*\",\"D:/*\",\"+r+d\");$FG$ to check my changes.
* Use $FG,2$<CTRL-ALT-a>$FG$ to enter an extended ASCII char.
* Use $FG,2$<CTRL-ALT-f>$FG$ to toggle between $LK,"VGA ROM Font",A="MN:SYS_FONT_PTR"$ and $LK,"Std Font",A="FI:::/Kernel/FontStd.CC"$
* Use $FG,2$<CTRL-ALT-f>$FG$ to toggle between $LK,"VGA ROM Font",A="MN:SYS_FONT_PTR"$ and $LK,"Std Font",A="FI:::/Kernel/FontStd.CC"$.
* Use $FG,2$<CTRL-ALT-s>$FG$ will capture the screen as a sprite on the clip. You can save the cmd line doc as text with $FG,2$<CTRL-a>$FG$.

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@ -2,6 +2,16 @@ asm {
USE64
BTS U32 [SYS_RUN_LEVEL],RLf_64BIT
//Set required bits for SSE instruction execution
MOV_RAX_CR4
BTS RAX,CR4f_OSFXSR
MOV_CR4_RAX
MOV_EAX_CR0
BTR RAX,CR0f_EM
BTR RAX,CR0f_MP
BTS RAX,CR0f_NE
MOV_CR0_EAX
FNINIT
MOV RAX,SYS_FIXED_AREA+CSysFixedArea.init_fpu_mmx
FXSAVE U64 [RAX]
@ -43,8 +53,8 @@ USE64
USE32
SYS_ENTER_LONG_MODE:: //Switch to long 64-bit mode
MOV_EAX_CR4
OR EAX,0xB0
MOV_CR4_EAX
OR EAX, CR4F_PAE | CR4F_PGE
MOV_CR4_EAX
MOV EAX,[MEM_PML4]
MOV_CR3_EAX

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@ -495,6 +495,29 @@ class CKernel
#define RLF_ONCE_USER (1<<RLf_ONCE_USER)
#help_index "Processor"
//Control register flag bits
#define CR0f_MP 1 //Monitor coprocessor
#define CR0f_EM 2 //Emulation of coprocessor
#define CR0f_TS 3 //Task switched, some irrelevant x87 task management stuff
#define CR0f_NE 5 //Numeric error
#define CR0f_PG 31//Enable paging
#define CR4f_PAE 5 //Physical Address Extension, required by long mode
#define CR4f_PGE 7 //Page-Global Enable
#define CR4f_OSFXSR 9 //FXSAVE/FXRSTOR support enabled
#define CR4F_PAE (1<<CR4f_PAE)
#define CR4F_PGE (1<<CR4f_PGE)
#define CR4F_OSFXSR (1<<CR4f_OSFXSR)

//Model specific regs.
#define IA32F_SCE 0x001
#define IA32F_LME 0x100
#define IA32_LAPIC_BASE 0x01B
#define IA32_EFER 0xC0000080
#define IA32_FS_BASE 0xC0000100
#define IA32_GS_BASE 0xC0000101
//Programmable Interrupt Controller
#define PIC1 0x20
#define PIC1_DATA 0x21
@ -542,14 +565,6 @@ class CKernel
#define IOAPICARB 0x02
#define IOREDTAB 0x10
//Model specific regs.
#define IA32F_SCE 0x001
#define IA32F_LME 0x100
#define IA32_LAPIC_BASE 0x01B
#define IA32_EFER 0xC0000080
#define IA32_FS_BASE 0xC0000100
#define IA32_GS_BASE 0xC0000101
class CAP16BitInit
{//AP Multicore
U32 jmp;

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@ -97,7 +97,7 @@ USE32
WBINVD
//disable paging
MOV_EAX_CR0
BTR EAX,31
BTR EAX,CR0f_PG
MOV_CR0_EAX
MOV ECX,IA32_EFER
@ -138,7 +138,7 @@ C32_ADD:: DU32 0;
USE64 MOV RSP,U64 [C32_RSP]
POP RAX
CALL SET_GS_BASE
POP RAX
 POP RAX
CALL SET_FS_BASE
POPFD

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