PCI Register defines, PCIRep shows prog_if

CPCIDev class added to
This commit is contained in:
xmm15 2020-02-17 00:02:08 -06:00
parent af86b51e29
commit 31270a4ead
9 changed files with 1020 additions and 927 deletions

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src/Home/Registry.CC Executable file
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@ -0,0 +1,10 @@
$TR,"Zenith"$
$ID,2$$TR,"SysMessageFlags"$
$ID,2$sys_message_flags[0]=0;
$ID,-2$$TR,"SysRegVer"$
$ID,2$registry_version=0.100;
$ID,-2$$ID,-2$$TR,"Once"$
$ID,2$$TR,"Zenith"$
$ID,2$$ID,-2$$TR,"User"$
$ID,2$$ID,-2$$ID,-2$$TR,"AutoComplete"$
$ID,2$ac.col=50;ac.row=15;$ID,-2$

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@ -590,7 +590,7 @@ public class CCountsGlobals
timer, //$LK,"SYS_TIMER_FREQ",A="MN:SYS_TIMER_FREQ"$. Use $LK,"SysTimerRead",A="MN:SysTimerRead"$(). timer, //$LK,"SYS_TIMER_FREQ",A="MN:SYS_TIMER_FREQ"$. Use $LK,"SysTimerRead",A="MN:SysTimerRead"$().
time_stamp_freq, time_stamp_freq,
time_stamp_kHz_freq, time_stamp_kHz_freq,
time_stamp_freq_initial; //Initial freq, sampled once at boot time. time_stamp_freq_initial; //Initial freq, sampled once at boot time.
Bool time_stamp_calibrated; Bool time_stamp_calibrated;
}; };
@ -2277,13 +2277,71 @@ class CUAsmGlobals
}; };
#help_index "Devices;PCI" #help_index "Devices;PCI"

//PCI Registers, used with $LK,"PCIRead",A="MN:PCIReadU16"$ functions.
#define PCIR_VENDOR_ID 0x00
#define PCIR_DEVICE_ID 0x02
#define PCIR_COMMAND 0x04
#define PCIR_STATUS 0x06
#define PCIR_REVISION_ID 0x08
#define PCIR_PROG_IF 0x09
#define PCIR_SUB_CODE 0x0A
#define PCIR_CLASS_CODE 0x0B
#define PCIR_CACHE_LINE_SIZE 0x0C
#define PCIR_LATENCY_TIMER 0x0D
#define PCIR_HEADER_TYPE 0x0E
#define PCIR_BIST 0x0F
#define PCIR_BASE0 0x10
#define PCIR_BASE1 0x14
#define PCIR_BASE2 0x18
#define PCIR_BASE3 0x1C
#define PCIR_BASE4 0x20
#define PCIR_BASE5 0x24
#define PCIR_SUBSYS_VENDOR_ID 0x2C
#define PCIR_SUBSYS_ID 0x2E
#define PCIR_EXPANSION_ROM 0x30
#define PCIR_CAPABILITIES 0x34
#define PCIR_INTERRUPT_LINE 0x3C
#define PCIR_INTERRUPT_PIN 0x3D
#define PCIR_MIN_GRANT 0x3E
#define PCIR_MAX_LATENCY 0x3F
//PCI class codes
#define PCIC_STORAGE 0x1
#define PCIC_NETWORK 0x2
//PCI subclass codes
#define PCISC_ETHERNET 0x0
#define PCISC_AHCI 0x6
class CPCIDev class CPCIDev
{ {
CPCIDev *next,*last; CPCIDev *next, *last;
U16 vendor,dev_id;
U8 bus,dev,fun,pad, U8 bus,dev,fun,
sub_code,base_code,pad[6], *vendor_str,
*vendor_str,*dev_id_str; *dev_id_str,
class_code,
sub_code,
prog_if,
revision_id,
bist,
header_type,
latency_timer,
cache_line_size,
capabilities,
interrupt_line,
interrupt_pin,
min_grant,
max_latency;
U16 vendor_id,
device_id,
subsys_id,
subsys_vendor_id;
U32 base[6],
erom;
}; };
#help_index "Devices;File/System;PCI" #help_index "Devices;File/System;PCI"

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@ -62,13 +62,10 @@ public _intern IC_STRLEN I64 StrLen(U8 *st); //String length.
#help_index "Data Types/Circular Queue" #help_index "Data Types/Circular Queue"
#help_file "::/Doc/Queue" #help_file "::/Doc/Queue"
public _intern IC_QUE_INIT U0 QueueInit( public _intern IC_QUE_INIT U0 QueueInit(CQueue *head); //Init queue head links.
CQueue *head); //Init queue head links. public _intern IC_QUE_INS U0 QueueInsert(CQueue *entry,CQueue *pred);//Insert item into que after predecessor.
public _intern IC_QUE_INS U0 QueueInsert( public _intern IC_QUE_INS_REV U0 QueueInsRev(CQueue *entry,CQueue *succ);//Revd insert into que.
CQueue *entry,CQueue *pred);//Insert item into que after predecessor. //Ins item into que before successor.
public _intern IC_QUE_INS_REV U0 QueueInsRev(
CQueue *entry,CQueue *succ);//Revd insert into que.
//Ins item into que before successor.
public _intern IC_QUE_REM U0 QueueRemove(CQueue *entry); //Remove item from queue. public _intern IC_QUE_REM U0 QueueRemove(CQueue *entry); //Remove item from queue.
#help_index "I/O;Processor/IO Port" #help_index "I/O;Processor/IO Port"

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@ -121,28 +121,46 @@ U0 PCILookUpSingle(CDoc *doc,I64 m,I64 d,U8 **_vendor,U8 **_dev)
U0 PCILookUpDevs() U0 PCILookUpDevs()
{ {
CPCIDev *tmppci; CPCIDev *tmppci;
I64 w1,w2,b,d,f,timeout=32*8*2; I64 w1, w2, b, d, f, timeout = 32 * 8 * 2;
CDoc *doc; CDoc *doc;
if (dev.pci_head.next!=&dev.pci_head) if (dev.pci_head.next != &dev.pci_head)
return; return;
doc=DocRead(PCI_DEV_FILE,DOCF_PLAIN_TEXT|DOCF_NO_CURSOR); doc = DocRead(PCI_DEV_FILE, DOCF_PLAIN_TEXT | DOCF_NO_CURSOR);
for (b=0;b<sys_pci_busses;b++) for (b = 0; b < sys_pci_busses; b++)
for (d=0;d<32;d++) for (d = 0; d < 32; d++)
for (f=0;f<8;f++) { for (f = 0; f < 8; f++)
w1=PCIReadU16(b,d,f,0); {
if (w1!=0xFFFF) { w1 = PCIReadU16(b, d, f, PCIR_VENDOR_ID);
tmppci=ZCAlloc(sizeof(CPCIDev)); if (w1 != 0xFFFF)
tmppci->bus=b; {
tmppci->dev=d; tmppci = ZCAlloc(sizeof(CPCIDev));
tmppci->fun=f; tmppci->bus = b;
tmppci->vendor=w1; tmppci->dev = d;
tmppci->dev_id=w2=PCIReadU16(b,d,f,2); tmppci->fun = f;
tmppci->sub_code=PCIReadU8(b,d,f,0xA); tmppci->vendor_id = w1;
tmppci->base_code=PCIReadU8(b,d,f,0xB); tmppci->device_id = w2 = PCIReadU16(b, d, f, PCIR_DEVICE_ID);
PCILookUpSingle(doc,w1,w2,&tmppci->vendor_str,&tmppci->dev_id_str); tmppci->sub_code = PCIReadU8(b, d, f, PCIR_SUB_CODE);
QueueInsert(tmppci,dev.pci_head.last); tmppci->class_code = PCIReadU8(b, d, f, PCIR_CLASS_CODE);
timeout=32*8*2; tmppci->prog_if = PCIReadU8(b, d, f, PCIR_PROG_IF);
} else if (sys_pci_busses==256 && --timeout<=0) tmppci->revision_id = PCIReadU8(b, d, f, PCIR_REVISION_ID);
tmppci->bist = PCIReadU8(b, d, f, PCIR_BIST);
tmppci->header_type = PCIReadU8(b, d, f, PCIR_HEADER_TYPE);
tmppci->latency_timer=PCIReadU8(b, d, f, PCIR_LATENCY_TIMER);
tmppci->capabilities= PCIReadU8(b, d, f, PCIR_CAPABILITIES);
tmppci->cache_line_size=PCIReadU8(b, d, f, PCIR_CACHE_LINE_SIZE);
tmppci->subsys_id = PCIReadU16(b, d, f, PCIR_SUBSYS_ID);
tmppci->subsys_vendor_id=PCIReadU16(b, d, f, PCIR_SUBSYS_VENDOR_ID);
tmppci->erom = PCIReadU32(b, d, f, PCIR_EXPANSION_ROM);
tmppci->base[0] = PCIReadU32(b, d, f, PCIR_BASE0);
tmppci->base[1] = PCIReadU32(b, d, f, PCIR_BASE1);
tmppci->base[2] = PCIReadU32(b, d, f, PCIR_BASE2);
tmppci->base[3] = PCIReadU32(b, d, f, PCIR_BASE3);
tmppci->base[4] = PCIReadU32(b, d, f, PCIR_BASE4);
tmppci->base[5] = PCIReadU32(b, d, f, PCIR_BASE5);
PCILookUpSingle(doc, w1, w2, &tmppci->vendor_str, &tmppci->dev_id_str);
QueueInsert(tmppci, dev.pci_head.last);
timeout = 32 * 8 * 2;
} else if (sys_pci_busses == 256 && --timeout <= 0)
goto lud_done; goto lud_done;
} }
lud_done: lud_done:
@ -160,9 +178,9 @@ public U0 PCIRep()
PCILookUpDevs; PCILookUpDevs;
tmppci=dev.pci_head.next; tmppci=dev.pci_head.next;
while (tmppci!=&dev.pci_head) { while (tmppci!=&dev.pci_head) {
"%02X:%02X:%01X %02X%02X $$GREEN$$%s $$CYAN$$%s$$FG$$\n", "%02X:%02X:%01X %02X-%02X-%02X $$GREEN$$%s $$CYAN$$%s$$FG$$\n",
tmppci->bus,tmppci->dev,tmppci->fun, tmppci->bus,tmppci->dev,tmppci->fun,
tmppci->base_code,tmppci->sub_code, tmppci->class_code,tmppci->sub_code,tmppci->prog_if,
tmppci->vendor_str,tmppci->dev_id_str; tmppci->vendor_str,tmppci->dev_id_str;
tmppci=tmppci->next; tmppci=tmppci->next;
} }