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PCI Register defines, PCIRep shows prog_if
CPCIDev class added to
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xmm15
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af86b51e29
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src/Home/Registry.CC
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10
src/Home/Registry.CC
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@ -0,0 +1,10 @@
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$TR,"Zenith"$
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$ID,2$$TR,"SysMessageFlags"$
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$ID,2$sys_message_flags[0]=0;
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$ID,-2$$TR,"SysRegVer"$
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$ID,2$registry_version=0.100;
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$ID,-2$$ID,-2$$TR,"Once"$
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$ID,2$$TR,"Zenith"$
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$ID,2$$ID,-2$$TR,"User"$
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$ID,2$$ID,-2$$ID,-2$$TR,"AutoComplete"$
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$ID,2$ac.col=50;ac.row=15;$ID,-2$
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src/Kernel.BIN.C
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src/Kernel.BIN.C
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@ -590,7 +590,7 @@ public class CCountsGlobals
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timer, //$LK,"SYS_TIMER_FREQ",A="MN:SYS_TIMER_FREQ"$. Use $LK,"SysTimerRead",A="MN:SysTimerRead"$().
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time_stamp_freq,
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time_stamp_kHz_freq,
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time_stamp_freq_initial; //Initial freq, sampled once at boot time.
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time_stamp_freq_initial; //Initial freq, sampled once at boot time.
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Bool time_stamp_calibrated;
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};
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@ -2277,13 +2277,71 @@ class CUAsmGlobals
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};
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#help_index "Devices;PCI"
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//PCI Registers, used with $LK,"PCIRead",A="MN:PCIReadU16"$ functions.
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#define PCIR_VENDOR_ID 0x00
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#define PCIR_DEVICE_ID 0x02
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#define PCIR_COMMAND 0x04
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#define PCIR_STATUS 0x06
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#define PCIR_REVISION_ID 0x08
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#define PCIR_PROG_IF 0x09
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#define PCIR_SUB_CODE 0x0A
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#define PCIR_CLASS_CODE 0x0B
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#define PCIR_CACHE_LINE_SIZE 0x0C
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#define PCIR_LATENCY_TIMER 0x0D
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#define PCIR_HEADER_TYPE 0x0E
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#define PCIR_BIST 0x0F
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#define PCIR_BASE0 0x10
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#define PCIR_BASE1 0x14
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#define PCIR_BASE2 0x18
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#define PCIR_BASE3 0x1C
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#define PCIR_BASE4 0x20
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#define PCIR_BASE5 0x24
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#define PCIR_SUBSYS_VENDOR_ID 0x2C
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#define PCIR_SUBSYS_ID 0x2E
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#define PCIR_EXPANSION_ROM 0x30
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#define PCIR_CAPABILITIES 0x34
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#define PCIR_INTERRUPT_LINE 0x3C
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#define PCIR_INTERRUPT_PIN 0x3D
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#define PCIR_MIN_GRANT 0x3E
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#define PCIR_MAX_LATENCY 0x3F
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//PCI class codes
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#define PCIC_STORAGE 0x1
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#define PCIC_NETWORK 0x2
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//PCI subclass codes
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#define PCISC_ETHERNET 0x0
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#define PCISC_AHCI 0x6
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class CPCIDev
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{
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CPCIDev *next,*last;
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U16 vendor,dev_id;
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U8 bus,dev,fun,pad,
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sub_code,base_code,pad[6],
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*vendor_str,*dev_id_str;
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CPCIDev *next, *last;
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U8 bus,dev,fun,
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*vendor_str,
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*dev_id_str,
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class_code,
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sub_code,
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prog_if,
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revision_id,
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bist,
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header_type,
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latency_timer,
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cache_line_size,
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capabilities,
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interrupt_line,
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interrupt_pin,
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min_grant,
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max_latency;
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U16 vendor_id,
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device_id,
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subsys_id,
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subsys_vendor_id;
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U32 base[6],
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erom;
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};
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#help_index "Devices;File/System;PCI"
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@ -62,13 +62,10 @@ public _intern IC_STRLEN I64 StrLen(U8 *st); //String length.
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#help_index "Data Types/Circular Queue"
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#help_file "::/Doc/Queue"
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public _intern IC_QUE_INIT U0 QueueInit(
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CQueue *head); //Init queue head links.
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public _intern IC_QUE_INS U0 QueueInsert(
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CQueue *entry,CQueue *pred);//Insert item into que after predecessor.
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public _intern IC_QUE_INS_REV U0 QueueInsRev(
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CQueue *entry,CQueue *succ);//Revd insert into que.
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//Ins item into que before successor.
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public _intern IC_QUE_INIT U0 QueueInit(CQueue *head); //Init queue head links.
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public _intern IC_QUE_INS U0 QueueInsert(CQueue *entry,CQueue *pred);//Insert item into que after predecessor.
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public _intern IC_QUE_INS_REV U0 QueueInsRev(CQueue *entry,CQueue *succ);//Revd insert into que.
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//Ins item into que before successor.
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public _intern IC_QUE_REM U0 QueueRemove(CQueue *entry); //Remove item from queue.
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#help_index "I/O;Processor/IO Port"
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@ -121,28 +121,46 @@ U0 PCILookUpSingle(CDoc *doc,I64 m,I64 d,U8 **_vendor,U8 **_dev)
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U0 PCILookUpDevs()
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{
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CPCIDev *tmppci;
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I64 w1,w2,b,d,f,timeout=32*8*2;
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I64 w1, w2, b, d, f, timeout = 32 * 8 * 2;
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CDoc *doc;
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if (dev.pci_head.next!=&dev.pci_head)
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if (dev.pci_head.next != &dev.pci_head)
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return;
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doc=DocRead(PCI_DEV_FILE,DOCF_PLAIN_TEXT|DOCF_NO_CURSOR);
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for (b=0;b<sys_pci_busses;b++)
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for (d=0;d<32;d++)
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for (f=0;f<8;f++) {
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w1=PCIReadU16(b,d,f,0);
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if (w1!=0xFFFF) {
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tmppci=ZCAlloc(sizeof(CPCIDev));
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tmppci->bus=b;
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tmppci->dev=d;
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tmppci->fun=f;
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tmppci->vendor=w1;
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tmppci->dev_id=w2=PCIReadU16(b,d,f,2);
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tmppci->sub_code=PCIReadU8(b,d,f,0xA);
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tmppci->base_code=PCIReadU8(b,d,f,0xB);
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PCILookUpSingle(doc,w1,w2,&tmppci->vendor_str,&tmppci->dev_id_str);
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QueueInsert(tmppci,dev.pci_head.last);
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timeout=32*8*2;
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} else if (sys_pci_busses==256 && --timeout<=0)
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doc = DocRead(PCI_DEV_FILE, DOCF_PLAIN_TEXT | DOCF_NO_CURSOR);
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for (b = 0; b < sys_pci_busses; b++)
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for (d = 0; d < 32; d++)
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for (f = 0; f < 8; f++)
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{
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w1 = PCIReadU16(b, d, f, PCIR_VENDOR_ID);
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if (w1 != 0xFFFF)
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{
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tmppci = ZCAlloc(sizeof(CPCIDev));
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tmppci->bus = b;
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tmppci->dev = d;
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tmppci->fun = f;
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tmppci->vendor_id = w1;
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tmppci->device_id = w2 = PCIReadU16(b, d, f, PCIR_DEVICE_ID);
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tmppci->sub_code = PCIReadU8(b, d, f, PCIR_SUB_CODE);
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tmppci->class_code = PCIReadU8(b, d, f, PCIR_CLASS_CODE);
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tmppci->prog_if = PCIReadU8(b, d, f, PCIR_PROG_IF);
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tmppci->revision_id = PCIReadU8(b, d, f, PCIR_REVISION_ID);
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tmppci->bist = PCIReadU8(b, d, f, PCIR_BIST);
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tmppci->header_type = PCIReadU8(b, d, f, PCIR_HEADER_TYPE);
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tmppci->latency_timer=PCIReadU8(b, d, f, PCIR_LATENCY_TIMER);
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tmppci->capabilities= PCIReadU8(b, d, f, PCIR_CAPABILITIES);
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tmppci->cache_line_size=PCIReadU8(b, d, f, PCIR_CACHE_LINE_SIZE);
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tmppci->subsys_id = PCIReadU16(b, d, f, PCIR_SUBSYS_ID);
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tmppci->subsys_vendor_id=PCIReadU16(b, d, f, PCIR_SUBSYS_VENDOR_ID);
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tmppci->erom = PCIReadU32(b, d, f, PCIR_EXPANSION_ROM);
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tmppci->base[0] = PCIReadU32(b, d, f, PCIR_BASE0);
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tmppci->base[1] = PCIReadU32(b, d, f, PCIR_BASE1);
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tmppci->base[2] = PCIReadU32(b, d, f, PCIR_BASE2);
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tmppci->base[3] = PCIReadU32(b, d, f, PCIR_BASE3);
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tmppci->base[4] = PCIReadU32(b, d, f, PCIR_BASE4);
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tmppci->base[5] = PCIReadU32(b, d, f, PCIR_BASE5);
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PCILookUpSingle(doc, w1, w2, &tmppci->vendor_str, &tmppci->dev_id_str);
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QueueInsert(tmppci, dev.pci_head.last);
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timeout = 32 * 8 * 2;
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} else if (sys_pci_busses == 256 && --timeout <= 0)
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goto lud_done;
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}
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lud_done:
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@ -160,9 +178,9 @@ public U0 PCIRep()
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PCILookUpDevs;
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tmppci=dev.pci_head.next;
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while (tmppci!=&dev.pci_head) {
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"%02X:%02X:%01X %02X%02X $$GREEN$$%s $$CYAN$$%s$$FG$$\n",
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tmppci->bus,tmppci->dev,tmppci->fun,
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tmppci->base_code,tmppci->sub_code,
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"%02X:%02X:%01X %02X-%02X-%02X $$GREEN$$%s $$CYAN$$%s$$FG$$\n",
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tmppci->bus,tmppci->dev,tmppci->fun,
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tmppci->class_code,tmppci->sub_code,tmppci->prog_if,
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tmppci->vendor_str,tmppci->dev_id_str;
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tmppci=tmppci->next;
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}
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