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https://github.com/Zeal-Operating-System/ZealOS.git
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OM -> OCM
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831e12ad75
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@ -228,33 +228,33 @@ I64 AsmMakeArgMask(CCompCtrl *cc, CAsmArg *arg)
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arg->imm_or_off_present = FALSE; //Zero displacement
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if (arg->reg2 != REG_NONE || arg->scale != 1)
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{
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res &= 0x0000FF0000;
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{//if reg or scale
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res &= ARGG_M|ARGG_RM; //0x0000FF0000;
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goto mm_done;
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}
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if (arg->indirect)
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{
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if (arg->imm_or_off_present)
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res &= 0x00FFFF0000;
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res &= ARGG_RM|ARGG_M|ARGG_MN|ARGG_MOFFS;//0x00FFFF0000;
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else
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res &= 0x000FFF0000;
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res &= ARGG_RM|ARGG_M|ARGG_MN;//0x000FFF0000;
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}
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else
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{
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if (arg->imm_or_off_present)
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res &= 0x000F000FFE;
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res &= ARGG_MN|ARGG_IMM|ARGG_UIMM|ARGG_REL; //0x000F000FFE;
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else
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res &= 0x3F0FFFF000;
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res &= ARGG_R|ARGG_RM|ARGG_M|ARGG_MN|ARGT_AL|ARGT_AX|ARGT_EAX|ARGT_RAX|ARGT_CL|ARGT_DX;//0x3F0FFFF000;
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}
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if (arg->seg != REG_NONE)
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res&=0x00FFFF0000;
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res &= ARGG_RM|ARGG_M|ARGG_MN|ARGG_MOFFS;//0x00FFFF0000;
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if (arg->reg1 == REG_NONE)
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{
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if (arg->indirect)
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res &= 0x00FFFF0000;
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res &= ARGG_RM|ARGG_M|ARGG_MN|ARGG_MOFFS; //0x00FFFF0000;
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else if (arg->num.i < 0)
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{
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if (arg->num.i >= I8_MIN)
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@ -477,17 +477,17 @@ Bool ParseAsmInst(CCompCtrl *cc,CHashOpcode *tmpo,I64 argcount)
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aotc->seg_size!=16 && tmpins->flags & IEF_OP_SIZE16)
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cur.has_operand_prefix=TRUE;
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if (om==OM_IB) cur.imm.U8_count=1;
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else if (om==OM_IW) cur.imm.U8_count=2;
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else if (om==OM_ID) cur.imm.U8_count=4;
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if (om==OCM_IB) cur.imm.U8_count=1;
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else if (om==OCM_IW) cur.imm.U8_count=2;
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else if (om==OCM_ID) cur.imm.U8_count=4;
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if (om==OM_CB) {
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if (om==OCM_CB) {
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cur.imm.U8_count=1;
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cur.imm.imm_flag=FALSE;
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} else if (om==OM_CW) {
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} else if (om==OCM_CW) {
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cur.imm.U8_count=2;
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cur.imm.imm_flag=FALSE;
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} else if (om==OM_CD) {
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} else if (om==OCM_CD) {
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cur.imm.U8_count=4;
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cur.imm.imm_flag=FALSE;
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}
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@ -1887,14 +1887,14 @@ class CInst
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};
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//x86 opcodes
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#define OC_OP_SIZE_PREFIX 0x66
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#define OC_ADDR_SIZE_PREFIX 0x67
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#define OC_LOCK_PREFIX 0xF0
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#define OC_NOP 0x90
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#define OC_BPT 0xCC
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#define OC_CALL 0xE8
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#define OC_JMP_REL8 0xEB
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#define OC_NOP2 (OC_NOP<<8+OC_OP_SIZE_PREFIX)
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#define OC_OP_SIZE_PREFIX 0x66
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#define OC_ADDR_SIZE_PREFIX 0x67
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#define OC_LOCK_PREFIX 0xF0
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#define OC_NOP 0x90
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#define OC_BPT 0xCC
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#define OC_CALL 0xE8
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#define OC_JMP_REL8 0xEB
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#define OC_NOP2 (OC_NOP<<8+OC_OP_SIZE_PREFIX)
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#define PUSH_C_REGS PUSH RAX PUSH RCX PUSH RDX PUSH RBX PUSH R8 PUSH R9
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#define POP_C_REGS POP R9 POP R8 POP RBX POP RDX POP RCX POP RAX
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@ -1904,31 +1904,31 @@ PUSH RDI PUSH R8 PUSH R9 PUSH R10 PUSH R11 PUSH R12 PUSH R13 PUSH R14 PUSH R15
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#define POP_REGS POP R15 POP R14 POP R13 POP R12 POP R11 POP R10 POP R9 \
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POP R8 POP RDI POP RSI POP RBP POP RBX POP RDX POP RCX POP RAX
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#define REG_RAX 0
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#define REG_RCX 1
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#define REG_RDX 2
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#define REG_RBX 3
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#define REG_RSP 4
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#define REG_RBP 5
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#define REG_RSI 6
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#define REG_RDI 7
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#define REG_R8 8
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#define REG_REGS_NUM 16
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#define REG_RAX 0
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#define REG_RCX 1
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#define REG_RDX 2
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#define REG_RBX 3
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#define REG_RSP 4
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#define REG_RBP 5
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#define REG_RSI 6
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#define REG_RDI 7
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#define REG_R8 8
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#define REG_REGS_NUM 16
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#define REG_RIP 16 //Used by compiler, not really it's num
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#define REG_RIP 16 //Used by compiler, not really it's num
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//Be careful: RBPu8, RSPu8, RSIu8, RDIu8 are 20-24
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#define REG_NONE 32 //noreg flag sets it to this
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#define REG_ALLOC 33 //reg flag sets it to this
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#define REG_UNDEF I8_MIN
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#define REG_NONE 32 //noreg flag sets it to this
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#define REG_ALLOC 33 //reg flag sets it to this
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#define REG_UNDEF I8_MIN
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#define REGG_CLOBBERED 0x013F //RAX,RCX,RDX,RBX,R8
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#define REGG_SAVED 0x0030 //RBP,RSP
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#define REGG_STACK_TMP 0x0200 //R9
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#define REGG_LOCAL_VARS 0xCCC0 //RSI,RDI,R10,R11,R14,R15
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#define REGG_CLOBBERED 0x013F //RAX,RCX,RDX,RBX,R8
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#define REGG_SAVED 0x0030 //RBP,RSP
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#define REGG_STACK_TMP 0x0200 //R9
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#define REGG_LOCAL_VARS 0xCCC0 //RSI,RDI,R10,R11,R14,R15
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#define REGG_LOCAL_NON_PTR_VARS 0x3000 //R12,R13
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#define AOT_BIN_BLK_BITS 16
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#define AOT_BIN_BLK_SIZE (1<<AOT_BIN_BLK_BITS)
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#define AOT_BIN_BLK_BITS 16
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#define AOT_BIN_BLK_SIZE (1<<AOT_BIN_BLK_BITS)
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class CAOTBinBlk
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{
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@ -2000,14 +2000,14 @@ class CAsmUnresolvedRef
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};
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//Opcode Modifier
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#define OM_NO 0
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#define OM_CB 1
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#define OM_CW 2
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#define OM_CD 3
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#define OM_CP 4
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#define OM_IB 5
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#define OM_IW 6
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#define OM_ID 7
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#define OCM_NO 0
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#define OCM_CB 1
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#define OCM_CW 2
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#define OCM_CD 3
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#define OCM_CP 4
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#define OCM_IB 5
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#define OCM_IW 6
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#define OCM_ID 7
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#define ARGt_NONE 0
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#define ARGt_REL8 1
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@ -2017,6 +2017,7 @@ class CAsmUnresolvedRef
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#define ARGT_REL8 (1<<ARGt_REL8)
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#define ARGT_REL16 (1<<ARGt_REL16)
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#define ARGT_REL32 (1<<ARGt_REL32)
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#define ARGG_REL (ARGT_REL8|ARGT_REL16|ARGT_REL32)
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#define ARGt_IMM8 4
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#define ARGt_IMM16 5
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@ -2026,6 +2027,7 @@ class CAsmUnresolvedRef
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#define ARGT_IMM16 (1<<ARGt_IMM16)
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#define ARGT_IMM32 (1<<ARGt_IMM32)
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#define ARGT_IMM64 (1<<ARGt_IMM64)
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#define ARGG_IMM (ARGT_IMM8|ARGT_IMM16|ARGT_IMM32|ARGT_IMM64)
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#define ARGt_UIMM8 8
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#define ARGt_UIMM16 9
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@ -2035,6 +2037,7 @@ class CAsmUnresolvedRef
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#define ARGT_UIMM16 (1<<ARGt_UIMM16)
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#define ARGT_UIMM32 (1<<ARGt_UIMM32)
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#define ARGT_UIMM64 (1<<ARGt_UIMM64)
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#define ARGG_UIMM (ARGT_UIMM8|ARGT_UIMM16|ARGT_UIMM32|ARGT_UIMM64)
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#define ARGt_R8 12
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#define ARGt_R16 13
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@ -2044,6 +2047,7 @@ class CAsmUnresolvedRef
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#define ARGT_R16 (1<<ARGt_R16)
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#define ARGT_R32 (1<<ARGt_R32)
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#define ARGT_R64 (1<<ARGt_R64)
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$ER$#define ARGG_R (ARGT_R8|ARGT_R16|ARGT_R32|ARGT_R64)
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#define ARGt_RM8 16
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#define ARGt_RM16 17
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@ -2053,6 +2057,7 @@ class CAsmUnresolvedRef
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#define ARGT_RM16 (1<<ARGt_RM16)
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#define ARGT_RM32 (1<<ARGt_RM32)
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#define ARGT_RM64 (1<<ARGt_RM64)
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#define ARGG_RM (ARGT_RM8|ARGT_RM16|ARGT_RM32|ARGT_RM64)
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#define ARGt_M8 20
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#define ARGt_M16 21
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@ -2062,6 +2067,7 @@ class CAsmUnresolvedRef
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#define ARGT_M16 (1<<ARGt_M16)
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#define ARGT_M32 (1<<ARGt_M32)
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#define ARGT_M64 (1<<ARGt_M64)
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#define ARGG_M (ARGT_M8|ARGT_M16|ARGT_M32|ARGT_M64)
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#define ARGt_M1632 24 // Not implemented
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#define ARGt_M16N32 25 // Not implemented
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@ -2071,6 +2077,7 @@ class CAsmUnresolvedRef
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#define ARGT_M16N32 (1<<ARGt_M16N32)
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#define ARGT_M16N16 (1<<ARGt_M16N16)
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#define ARGT_M32N32 (1<<ARGt_M32N32)
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#define ARGG_MN (ARGT_M1632|ARGT_M16N32|ARGT_M16N16|ARGT_M32N32)
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#define ARGt_MOFFS8 28
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#define ARGt_MOFFS16 29
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@ -2109,6 +2116,7 @@ class CAsmUnresolvedRef
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#define ARGT_FS (1<<ARGt_FS)
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#define ARGT_GS (1<<ARGt_GS)
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#define ARGT_CS (1<<ARGt_CS)
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#define ARGG_SREG (ARGT_SREG|ARGT_SS|ARGT_DS|ARGT_ES|ARGT_FS|ARGT_GS|ARGT_CS)
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#define ARGt_ST0 46
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#define ARGt_STI 47
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