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Rewrote IntEntry functions. Added CIDTEntry.

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Removed DPL argument from IntEntrySet.
Updated OS version to 1.12.
This commit is contained in:
Void NV 2020-04-12 17:14:55 -05:00
parent f6634624fd
commit c6dddb932b
10 changed files with 100 additions and 84 deletions
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BIN
Zenith-latest-2020-04-11-18_32_29.iso → Zenith-latest-2020-04-12-17_12_26.iso
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1
src/Demo/Lectures/InterruptDemo.CC
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@ -83,3 +83,4 @@ $PT$$FG$$BG$6 Cores 3.395GHz
Interrupt Cycles: 573.98543
Call Cycles: 9.74349
$HL,1$*/

4
src/Demo/Lectures/Ring3.CC
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@ -29,7 +29,7 @@ U0 Ring3Demo()
U8 *old_vect;
"Progress1 Before:%X\n",progress1;
CLI
old_vect=IntEntrySet(0x0D,INT_TO_RING0,IDTET_TRAP,0);
old_vect=IntEntrySet(0x0D,INT_TO_RING0,IDTET_TRAP);
TSSBusy(Gs->tss->tr_ring3,OFF);
RAXSet(Gs->tss->tr_ring3+3);
@ -67,7 +67,7 @@ U0 Ring3Demo()
RAXSet(Gs->tss->tr);
LTR AX
IntEntrySet(0x0D,old_vect,IDTET_IRQ,0);
IntEntrySet(0x0D,old_vect,IDTET_IRQ);
STI
"Progress1 After :%X\n",progress1;
}

4
src/Doc/ChangeLog.DD
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@ -1,4 +1,8 @@
$WW,1$$FG,5$$TX+CX,"ChangeLog"$$FG$
$IV,1$----04/12/20 17:06:38----$IV,0$
* Added $LK,"CIDTEntry",A="MN:CIDTEntry"$ and rewrote $LK,"IntEntryGet",A="MN:IntEntryGet"$() and $LK,"IntEntrySet",A="MN:IntEntrySet"$(). $LK,"dev",A="MN:CDevGlobals"$.idt is now $LK,"allocated",A="FF:::/Kernel/KInterrupts.CC,CAllocAligned"$ on an 8-byte boundary as per Intel SDM recommendation.
* Updated $LK,"OS version",A="MN:sys_os_version"$.
$IV,1$----04/11/20 18:10:58----$IV,0$
* Beginning efforts to reformat files some. Currently, keeping a temp log of progress at $LK,"FilesRefactored",A="FI:C:/Home/FilesRefactored.DD"$.

2
src/Home/K.CC
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@ -1,6 +1,6 @@
Ed("/Doc/ChangeLog.DD");
In("CC\n\n1\n\n6\n\n\n");
In("CC\n\n1\n\n7\n\n\n");
BootHDIns;
"\n\nSuccessful? ";
if(YorN)

4
src/Kernel/KGlobals.CC
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@ -11,8 +11,8 @@ I64 sys_num_spawned_tasks;
CTask *sys_winmgr_task,*sys_task_being_screen_updated;
U8 *rev_bits_table; //Table with U8 bits reversed
CDate local_time_offset;
F64 *pow10_I64,
sys_os_version=1.000;
F64 *pow10_I64,
sys_os_version=1.12;
CAutoCompleteDictGlobals acd;
CAutoCompleteGlobals ac;

96
src/Kernel/KInterrupts.CC
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@ -95,55 +95,54 @@ INT_FAULT_ERR_CODE_BITMAP::
}
U8 *IntEntryGet(I64 irq)
{//Get interrupt vector.
U8 *res;
I64 *src;
src=dev.idt(U8 *)+irq*16;
res(I64).u16[0]=*src(U16 *);
src(U8 *)+=6;
res(I64).u16[1]=*src(U16 *)++;
res(I64).u32[1]=*src(U32 *);
return res;
{//Get interrupt handler.
I64 handler_addr;
CIDTEntry *entry = &dev.idt[irq];
handler_addr.u16[0] = entry->offset_low;
handler_addr.u16[1] = entry->offset_mid;
handler_addr.u32[1] = entry->offset_hi;
return handler_addr;
}
U8 *IntEntrySet(I64 irq,U0 (*fp_new_handler)(),I64 type=IDTET_IRQ,I64 dpl=0)
{//Set interrupt vector. See $LK,"IDTET_IRQ",A="MN:IDTET_IRQ"$.
U8 *IntEntrySet(I64 irq, U0 (*fp_new_handler)(), I64 type=IDTET_IRQ)
{//Set interrupt handler. Returns old handler. See $LK,"IDTET_IRQ",A="MN:IDTET_IRQ"$.
//See $LK,"::/Demo/Lectures/InterruptDemo.CC"$.
//See $LK,"::/Demo/MultiCore/Interrupts.CC"$.
I64 fp=fp_new_handler;
U8 *res,*dst;
//See $LK,"::/Demo/MultiCore/Interrupts.CC"$.
I64 fp = fp_new_handler;
U8 *old_handler;
CIDTEntry *entry;
PUSHFD
CLI
res=IntEntryGet(irq);
dst=dev.idt(U8 *)+irq*16;
*dst(U16 *)++=fp.u16[0];
*dst(U16 *)++=offset(CGDT.cs64);
*dst(U16 *)++=0x8000+type<<8+dpl<<13;
*dst(U16 *)++=fp.u16[1];
*dst(U32 *)++=fp.u32[1];
*dst(U32 *)=0;
old_handler = IntEntryGet(irq);
entry = &dev.idt[irq];
entry->seg_select = offset(CGDT.cs64);
entry->offset_low = fp.u16[0];
entry->offset_mid = fp.u16[1];
entry->offset_hi = fp.u32[1];
entry->type_attr = 0x80 + type; //bit 7 is 'segment present'
entry->ist = entry->zero = 0; //We don't care about the IST mechanism
POPFD
return res;
return old_handler;
}
U0 IntsInit()
{//Init 8259
OutU8(PIC_1,0x11); //IW1
OutU8(PIC_2,0x11); //IW1
OutU8(PIC_1_DATA,0x20); //IW2
OutU8(PIC_2_DATA,0x28); //IW2
OutU8(PIC_1_DATA,0x04); //IW3
OutU8(PIC_2_DATA,0x02); //IW3
OutU8(PIC_1_DATA,0x0D); //IW4
OutU8(PIC_2_DATA,0x09); //IW4
OutU8(PIC_1_DATA,0xFA); //Mask all but IRQ0 (timer) and IRQ2 Cascade.
OutU8(PIC_2_DATA,0xFF);
OutU8(PIC_1, 0x11); //IW1
OutU8(PIC_2, 0x11); //IW1
OutU8(PIC_1_DATA, 0x20); //IW2
OutU8(PIC_2_DATA, 0x28); //IW2
OutU8(PIC_1_DATA, 0x04); //IW3
OutU8(PIC_2_DATA, 0x02); //IW3
OutU8(PIC_1_DATA, 0x0D); //IW4
OutU8(PIC_2_DATA, 0x09); //IW4
OutU8(PIC_1_DATA, 0xFA); //Mask all but IRQ0 (timer) and IRQ2 Cascade.
OutU8(PIC_2_DATA, 0xFF);
}
interrupt U0 IntNop()
{//Make unplanned IRQs stop by all means!
OutU8(PIC_2,PIC_EOI);
OutU8(PIC_1,PIC_EOI);
OutU8(PIC_2, PIC_EOI);
OutU8(PIC_1, PIC_EOI);
*(dev.uncached_alias + LAPIC_EOI)(U32 *) = 0;
}
@ -181,13 +180,14 @@ U0 IntInit1()
{//Interrupt descriptor table part1.
I64 i;
CSysLimitBase tmp_ptr;
if (!Gs->num) {//Gs cur $LK,"CCPU",A="MN:CCPU"$ struct
dev.idt=CAlloc(16*256);
for (i=0;i<256;i++)
if (!Gs->num) //Gs is current $LK,"CCPU",A="MN:CCPU"$ struct
{
dev.idt = CAllocAligned(sizeof(CIDTEntry) * 256, 8);
for (i = 0; i < 256; i++)
IntEntrySet(i,&IntNop);
}
tmp_ptr.limit=256*16-1;
tmp_ptr.base =dev.idt;
tmp_ptr.limit = 256 * sizeof(CIDTEntry) - 1;
tmp_ptr.base = dev.idt;
RAXSet(&tmp_ptr);
LIDT U64 [RAX]
}
@ -197,19 +197,19 @@ U0 IntInit2()
I64 i;
PUSHFD
CLI
IntEntrySet(I_DIV_ZERO,&IntDivZero);
for (i=1;i<0x20;i++)
IntEntrySet(i,&debug.int_fault_code[7*i]);
IntEntrySet(I_DIV_ZERO, &IntDivZero);
for (i = 1; i < 32; i++)
IntEntrySet(i, &debug.int_fault_code[7 * i]);
/*In theory, we use the PIC mask reg to insure we don't get
anything but keyboard, mouse and timer IRQs. In practice, I've
gotten IRQ 0x27, perhaps because I didn't initialize the APIC.
I go ahead and ACK PIC in $LK,"IntNop",A="MN:IntNop"$().
I have no idea why I got a IRQ 0x27.
*/
IntEntrySet(I_NMI,_SYS_HLT);
IntEntrySet(I_TIMER,IRQ_TIMER);
IntEntrySet(I_MP_CRASH,*INT_MP_CRASH_ADDR(U32 *));
IntEntrySet(I_WAKE,INT_WAKE);
IntEntrySet(I_DEBUG,&debug.int_fault_code[7*I_DEBUG]);
IntEntrySet(I_NMI, _SYS_HLT);
IntEntrySet(I_TIMER, IRQ_TIMER);
IntEntrySet(I_MP_CRASH, *INT_MP_CRASH_ADDR(U32 *));
IntEntrySet(I_WAKE, INT_WAKE);
IntEntrySet(I_DEBUG, &debug.int_fault_code[7 * I_DEBUG]);
POPFD
}

3
src/Kernel/KMain.CC
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@ -155,8 +155,7 @@ U0 KMain()
//Before this point use $LK,"Sound",A="MN:Sound"$() and $LK,"Busy",A="MN:Busy"$()
//to debug. After this point, use $LK,"RawPrint",A="MN:RawPrint"$()
LBts(&sys_run_level,RLf_RAW);
"ZenithOS V%5.3f\t%D %T\n\n",
sys_os_version,sys_compile_time,sys_compile_time;
"ZenithOS V%0.2f\t%D %T\n\n", sys_os_version,sys_compile_time,sys_compile_time;
TimerInit;
if (MemBIOSTotal < ToI64 (0.95*MEM_MIN_MEG*0x100000) )

67
src/Kernel/KernelA.HH
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@ -380,23 +380,36 @@ public class CMathODE
//Global Descriptor Table
class CGDTEntry
{
U64 lo,hi;
U64 lo,hi;
};
class CGDT
{
CGDTEntry null;
CGDTEntry boot_ds;
CGDTEntry boot_cs;
CGDTEntry cs32;
CGDTEntry cs64; //The $LK,"Charter",A="FI:::/Doc/Charter.DD"$ says just ring-0.
CGDTEntry cs64_ring3; //$LK,"Ring3",A="FI:::/Demo/Lectures/Ring3.CC"$, in case you want to play around.
CGDTEntry ds;
CGDTEntry ds_ring3;
CGDTEntry tr[MP_PROCESSORS_NUM];
CGDTEntry tr_ring3[MP_PROCESSORS_NUM];
CGDTEntry null,
boot_ds,
boot_cs,
cs32,
cs64, //The $LK,"Charter",A="FI:::/Doc/Charter.DD"$ says just ring-0.
cs64_ring3, //$LK,"Ring3",A="FI:::/Demo/Lectures/Ring3.CC"$, in case you want to play around.
ds,
ds_ring3,
tr[MP_PROCESSORS_NUM],
tr_ring3[MP_PROCESSORS_NUM];
};
//Interrupt Descriptor Table
class CIDTEntry
{
U16 offset_low,
seg_select;
U8 ist,
type_attr;
U16 offset_mid;
U32 offset_hi,
zero;
};
#assert sizeof(CIDTEntry) == 16
class CSysLimitBase
{
U16 limit; //Offset of last byte, not size.
@ -421,28 +434,28 @@ class CMemE820
#help_index "Compiler/Internal"
//Loader flags
#define LDF_NO_ABSS 1
#define LDF_JUST_LOAD 2
#define LDF_SILENT 4
#define LDF_NO_ABSS 1
#define LDF_JUST_LOAD 2
#define LDF_SILENT 4
#define BIN_SIGNATURE_VAL 'TOSB'
#define BIN_SIGNATURE_VAL 'ZCCB' //Zenith CosmiC Binary
class CBinFile
{//$LK,"Bin File Header Generation",A="FF:::/Compiler/CMain.CC,16 ALIGN"$ by compiler.
U16 jmp;
U8 module_align_bits,
reserved;
U32 bin_signature;
I64 org,
patch_table_offset, //$LK,"Patch Table Generation",A="FF:::/Compiler/CMain.CC,IET_ABS_ADDR"$
file_size;
U16 jmp;
U8 module_align_bits,
reserved;
U32 bin_signature;
I64 org,
patch_table_offset, //$LK,"Patch Table Generation",A="FF:::/Compiler/CMain.CC,IET_ABS_ADDR"$
file_size;
};
class CPatchTableAbsAddr
{
U8 eit_abs_addr; //$LK,"IET_ABS_ADDR",A="MN:IET_ABS_ADDR"$
U32 abs_addres_count;
U8 zero;
U32 abs_addres[1];
U8 eit_abs_addr; //$LK,"IET_ABS_ADDR",A="MN:IET_ABS_ADDR"$
U32 abs_addres_count;
U8 zero;
U32 abs_addres[1];
};
//$LK,"CAOTImportExport",A="MN:CAOTImportExport"$ Types. Used in PatchTable.
@ -3343,7 +3356,7 @@ public class CHeapCtrl
#help_index "Devices;Memory/Page Tables"
public class CDevGlobals
{
I64 *idt;
CIDTEntry *idt;
U8 *mem64_ptr;
U8 *uncached_alias; //Alias of lowest 4Gig.
U8 mp_apic_ids[MP_PROCESSORS_NUM];

3
src/Kernel/KernelC.HH
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@ -652,8 +652,7 @@ public extern I64 ATARep(Bool prompt=TRUE,
#help_index "Processor"
public extern U8 *IntEntryGet(I64 irq);
public extern U8 *IntEntrySet(I64 irq,
U0 (*fp_new_handler)(),I64 type=IDTET_IRQ,I64 dpl=0);
public extern U8 *IntEntrySet(I64 irq, U0 (*fp_new_handler)(),I64 type=IDTET_IRQ);
#help_index "ScreenCast;Cmd Line (Typically)"
public extern Bool ScreenCast(Bool val=ON,Bool just_audio=FALSE,